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Wait for QSPI flash operations to complete
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@@ -35,6 +35,22 @@ TEST(OtaQspiTiming, PreservesDeepPowerDownEntryAndWakeGuards) {
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EXPECT_GE(MOTA_QSPI_DPD_WAKE_GUARD_US, 45u);
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}
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TEST(OtaQspiStatus, TreatsOnlyTheNorWriteInProgressBitAsBusy) {
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// Nordic READY is not flash completion. The hardware path polls RDSR until
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// this predicate clears after every program and erase operation.
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EXPECT_FALSE(mota_qspi_status_busy(0x00));
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EXPECT_FALSE(mota_qspi_status_busy(0xFC));
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EXPECT_TRUE(mota_qspi_status_busy(0x01));
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EXPECT_TRUE(mota_qspi_status_busy(0xFF));
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}
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TEST(OtaQspiDiagnostics, ExposesStableFailureStageNames) {
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EXPECT_STREQ(mota_qspi_stage_name(OtaQspiStage::PROGRAM), "program");
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EXPECT_STREQ(mota_qspi_stage_name(OtaQspiStage::PROGRAM_BUSY), "program-busy");
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EXPECT_STREQ(mota_qspi_stage_name(OtaQspiStage::ERASE_BUSY), "erase-busy");
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EXPECT_STREQ(mota_qspi_stage_name(OtaQspiStage::INVALIDATE_VERIFY), "invalidate-verify");
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}
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TEST(OtaFlashPlan, SelectsCeilingFromLinkedLayoutAndStorage) {
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// Actual internal secondary storage is authoritative regardless of linker selection.
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EXPECT_EQ(mota_nrf52_stage_ceiling_for_layout(EXPANDED, true), LEGACY);
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