mirror of
https://github.com/mikecarper/MeshCore.git
synced 2026-09-26 22:17:58 +00:00
mikecarper
0e5955f889
Keep TCXO warm during owned dual-profile retunes, batch modulation setup, and enable guarded fast RX with buffered 8 MHz SPI on XIAO S3 WIO and Indicator LoRa. Preserve lifecycle invalidation, packet guards, rollback, and existing scheduling budgets. Add reliable sequence-scoped USB lab transport, native regression coverage, bounded channel and preamble diagnostics, and byte-exact measurement records including failed experiments and qualification limits.
12462 lines
250 KiB
JSON
12462 lines
250 KiB
JSON
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|
|
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|
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|
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|
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{
|
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|
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|
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|
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|
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|
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|
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|
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|
|
},
|
|
{
|
|
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|
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|
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|
|
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|
|
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|
|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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},
|
|
{
|
|
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|
|
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|
|
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|
|
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|
|
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|
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|
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|
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|
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|
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|
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|
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|
|
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|
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|
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|
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|
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|
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|
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|
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|
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|
|
},
|
|
"valid": true
|
|
}
|
|
],
|
|
"scope": "Stationary short-range payload checks, not sensitivity/PER qualification"
|
|
}
|