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https://github.com/mikecarper/MeshCore.git
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mikecarper
091c8d8324
Skip redundant modulation writes during owned fast RX retunes when the last acknowledged SF/BW/CR/LDRO tuple matches. Invalidate that cache after ordinary setters, failed writes, and lifecycle changes. Include the remaining scan, preamble, settling, and memory-soak experiments, their collectors, validation notes, and original capture records. Preserve capture bytes across checkouts and keep private soak credentials local. Run lab collector and compiled contract tests in CI. Update the expectation, profile mapping, and result-buffer tests for the extended lab tools, and make the private WiFi override header optional for ordinary soak diagnostics. Validation: 145 host tests passed from the staged source snapshot. Clean heltec_v4_repeater and Xiao_S3_WIO_companion_radio_usb builds passed their RAM/flash gates. All 229 staged capture files retain their original bytes; all 75 local documentation links resolve in the clean snapshot.
99 lines
3.9 KiB
C++
99 lines
3.9 KiB
C++
#pragma once
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// HIL-only experiments. Never included by a production target. These rely on
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// an explicitly identified RX-to-RX hop, not a general cached radio state.
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#include <helpers/radiolib/CustomSX1262.h>
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class ExperimentalSX1262 : public CustomSX1262 {
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public:
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enum : uint32_t {
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NoRxStandby = 1, NoIrqRewrite = 2, NoBufferRewrite = 4,
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NoPacketRewrite = 8, NoModemQuery = 16, DeferPreamble = 32,
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NoWakeNop = 64, ManualRxControl = 128,
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};
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uint32_t experiment = 0;
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bool productionPath = true;
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bool repeatFrequency = false; // explicit same-image HIL toggle; reset on boot
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bool inHop = false, resumeRx = false, haveStandby = false;
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bool packetWritten = false, preamblePending = false, rxPrimed = false;
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using CustomSX1262::CustomSX1262;
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void beginHop(bool rx) {
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inHop = true; resumeRx = rx; haveStandby = packetWritten = preamblePending = false;
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}
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void endHop() { inHop = resumeRx = haveStandby = false; }
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using CustomSX1262::setFrequency;
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int16_t setFrequency(float freq) override {
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int16_t rc = SX1262::setFrequency(freq);
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if (rc == RADIOLIB_ERR_NONE && repeatFrequency && inHop && resumeRx) {
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// Repeat the identical 0x86 immediately, before modulation/packet/RX.
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// Only the first call may calibrate; keep normal BUSY/status checks.
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rc = SX1262::setFrequency(freq, true);
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}
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return rc; // a failed first/second write aborts the normal profile apply
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}
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int16_t standby() override {
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if (productionPath) return CustomSX1262::standby();
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const bool knownAwake = inHop && resumeRx && (experiment & NoWakeNop);
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const int16_t rc = SX1262::standby(standbyXOSC ? RADIOLIB_SX126X_STANDBY_XOSC
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: RADIOLIB_SX126X_STANDBY_RC, !knownAwake);
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if (inHop && rc == RADIOLIB_ERR_NONE) haveStandby = true;
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return rc;
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}
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int16_t setPreambleLength(size_t symbols) override {
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if (productionPath) return CustomSX1262::setPreambleLength(symbols);
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if (inHop && resumeRx && haveStandby && (experiment & DeferPreamble)) {
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preambleLengthLoRa = symbols;
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preamblePending = true;
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return RADIOLIB_ERR_NONE;
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}
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const int16_t rc = SX1262::setPreambleLength(symbols);
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if (inHop && rc == RADIOLIB_ERR_NONE) packetWritten = true;
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return rc;
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}
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int16_t startReceive() override {
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if (productionPath) return CustomSX1262::startReceive();
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if (!experiment || !inHop || !resumeRx || !haveStandby || !rxPrimed) {
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const int16_t rc = CustomSX1262::startReceive();
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rxPrimed = rc == RADIOLIB_ERR_NONE;
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return rc;
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}
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// Same sequence and error checks as pinned RadioLib's stageMode(RX),
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// selectively omitting only the particular operation under test.
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int16_t rc;
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if (!(experiment & NoRxStandby)) {
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rc = standby();
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RADIOLIB_ASSERT(rc);
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}
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if (!(experiment & NoIrqRewrite)) {
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rc = setDioIrqParams(getIrqMapped(RADIOLIB_IRQ_RX_DEFAULT_FLAGS
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| (1UL << RADIOLIB_IRQ_PREAMBLE_DETECTED)),
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getIrqMapped(RADIOLIB_IRQ_RX_DEFAULT_MASK));
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RADIOLIB_ASSERT(rc);
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}
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if (!(experiment & NoBufferRewrite)) {
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rc = setBufferBaseAddress();
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RADIOLIB_ASSERT(rc);
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}
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rc = clearIrqStatus(); // never omit clearing consumed/stale IRQ flags
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RADIOLIB_ASSERT(rc);
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if (!(experiment & NoModemQuery)
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&& getPacketType() != RADIOLIB_SX126X_PACKET_TYPE_LORA) {
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return RADIOLIB_ERR_WRONG_MODEM;
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}
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if (!(experiment & NoPacketRewrite) || !packetWritten || preamblePending) {
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rc = setPacketParams(preambleLengthLoRa, crcTypeLoRa, implicitLen, headerType, invertIQEnabled);
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RADIOLIB_ASSERT(rc);
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}
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rxTimeout = RADIOLIB_SX126X_RX_TIMEOUT_INF;
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getMod()->setRfSwitchState(Module::MODE_RX);
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rc = setRx(rxTimeout); // retains all RadioLib BUSY polling/error handling
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stagedMode = RADIOLIB_RADIO_MODE_NONE;
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if (rc != RADIOLIB_ERR_NONE) rxPrimed = false;
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return rc;
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}
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};
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