mirror of
https://github.com/mikecarper/MeshCore.git
synced 2026-09-25 18:33:37 +00:00
mikecarper
0e5955f889
Keep TCXO warm during owned dual-profile retunes, batch modulation setup, and enable guarded fast RX with buffered 8 MHz SPI on XIAO S3 WIO and Indicator LoRa. Preserve lifecycle invalidation, packet guards, rollback, and existing scheduling budgets. Add reliable sequence-scoped USB lab transport, native regression coverage, bounded channel and preamble diagnostics, and byte-exact measurement records including failed experiments and qualification limits.
639 lines
13 KiB
JSON
639 lines
13 KiB
JSON
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"schema": 5,
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"experiment": "rx_after_profile_switch_packets",
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"profile": 0,
|
|
"sf500": 7,
|
|
"preamble": 32,
|
|
"setup_deferrals": 0
|
|
},
|
|
"sent": {
|
|
"sent": 19,
|
|
"len": 16,
|
|
"rc": 0,
|
|
"power_dbm": -9
|
|
},
|
|
"received": {
|
|
"received": 19,
|
|
"len": 16,
|
|
"valid": true,
|
|
"profile": 0,
|
|
"rssi": -43.0,
|
|
"snr": 12.0,
|
|
"rx_errors": 0
|
|
},
|
|
"valid": true
|
|
}
|
|
],
|
|
"scope": "Stationary short-range payload checks, not sensitivity/PER qualification"
|
|
}
|