diff --git a/README.md b/README.md index 2acd40a..6152ccf 100644 --- a/README.md +++ b/README.md @@ -28,6 +28,7 @@ Other benefits: | **ThinkNode M3** | LR1110 | GPS, buzzer, two buttons, RGB LEDs | | **ThinkNode M6** | SX1262 | GPS (L76K), QSPI flash, RGB LEDs | | **LilyGo T-Echo** | SX1262 (TCXO 1.8V) | GPS (L76K), 1.54" e-paper (SSD1681), BME280, QSPI flash, touch-button backlight | +| **Heltec Mesh Node T096** | SX1262 + KCT8103L PA/FEM | UC6580 GNSS, button, LED, battery ADC | | **Ikoka Nano 30dBm** | SX1262 (E22-900M30S, 30 dBm PA) | RGB LEDs | | **GAT562 30S Mesh Kit** | SX1262 (30 dBm / 1 W PA) | RAK4631 core module. OLED (SSD1306), 5-way joystick, buzzer, GPS, BME280 pad, 2×18650 + solar | | **SenseCAP Solar** | SX1262 | GPS (L76K), QSPI flash, battery monitor | diff --git a/build.sh b/build.sh index 1361e1e..d89ac12 100644 --- a/build.sh +++ b/build.sh @@ -20,6 +20,7 @@ nRF_boards=( lilygo_techo promicro_sx1262 heltec_t114 + heltec_t096 gat562_30s ) @@ -250,4 +251,4 @@ print(str(size // 1048576) + "MB") mv build/zephcore/zephyr/zephyr.signed.bin firmware/"$board_clean_for_path"-repeater-"$COMMIT_HASH".bin fi done -fi \ No newline at end of file +fi diff --git a/zephcore/CMakeLists.txt b/zephcore/CMakeLists.txt index fd9285d..8b8d54d 100644 --- a/zephcore/CMakeLists.txt +++ b/zephcore/CMakeLists.txt @@ -265,7 +265,7 @@ set(ZEPHCORE_COMMON_CONF "${CMAKE_CURRENT_SOURCE_DIR}/boards/common/zephcore_com # Detect platform from board name and add platform-specific common config # For boards with qualifiers like "wio_tracker_l1/nrf52840", check both the full BOARD # string and the BOARD_QUALIFIERS which contains just the qualifier (e.g., "nrf52840") -if(BOARD MATCHES ".*nrf52.*" OR BOARD MATCHES "rak4631" OR BOARD MATCHES "rak_wismesh_tag" OR BOARD MATCHES "rak3401_1watt" OR BOARD MATCHES "wio_tracker" OR BOARD MATCHES "ikoka_nano" OR BOARD MATCHES "t1000_e" OR BOARD MATCHES "thinknode_m1" OR BOARD MATCHES "thinknode_m3" OR BOARD MATCHES "thinknode_m6" OR BOARD MATCHES "promicro_lr2021" OR BOARD MATCHES "promicro_sx1262" OR BOARD MATCHES "sensecap_solar" OR BOARD MATCHES "xiao_nrf52840" OR BOARD MATCHES "lilygo_techo" OR BOARD MATCHES "heltec_t114" OR BOARD MATCHES "gat562") +if(BOARD MATCHES ".*nrf52.*" OR BOARD MATCHES "rak4631" OR BOARD MATCHES "rak_wismesh_tag" OR BOARD MATCHES "rak3401_1watt" OR BOARD MATCHES "wio_tracker" OR BOARD MATCHES "ikoka_nano" OR BOARD MATCHES "t1000_e" OR BOARD MATCHES "thinknode_m1" OR BOARD MATCHES "thinknode_m3" OR BOARD MATCHES "thinknode_m6" OR BOARD MATCHES "promicro_lr2021" OR BOARD MATCHES "promicro_sx1262" OR BOARD MATCHES "sensecap_solar" OR BOARD MATCHES "xiao_nrf52840" OR BOARD MATCHES "lilygo_techo" OR BOARD MATCHES "heltec_t114" OR BOARD MATCHES "heltec_t096" OR BOARD MATCHES "gat562") set(ZEPHCORE_PLATFORM_CONF "${CMAKE_CURRENT_SOURCE_DIR}/boards/common/nrf52_common.conf") elseif(DEFINED BOARD_QUALIFIERS AND BOARD_QUALIFIERS MATCHES ".*nrf52.*") set(ZEPHCORE_PLATFORM_CONF "${CMAKE_CURRENT_SOURCE_DIR}/boards/common/nrf52_common.conf") diff --git a/zephcore/boards/example_board/README.md b/zephcore/boards/example_board/README.md index 2a844c0..d7c1a53 100644 --- a/zephcore/boards/example_board/README.md +++ b/zephcore/boards/example_board/README.md @@ -24,6 +24,7 @@ Supported Boards | GAT562 30S Mesh Kit | `west build -b gat562_30s zephcore` | UF2 drag-drop or `west flash` | | LilyGo T-Echo | `west build -b lilygo_techo zephcore` | UF2 drag-drop or `west flash` | | Heltec T114 | `west build -b heltec_t114 zephcore` | UF2 drag-drop or `west flash` | +| Heltec Mesh Node T096 | `west build -b heltec_t096 zephcore` | UF2 drag-drop or `west flash` | **Heltec T114 screenless:** append `boards/nrf52840/heltec_t114/no_display.conf` to `EXTRA_CONF_FILE` for units without the TFT module. diff --git a/zephcore/boards/nrf52840/heltec_t096/Kconfig.heltec_t096 b/zephcore/boards/nrf52840/heltec_t096/Kconfig.heltec_t096 new file mode 100644 index 0000000..0a3bd09 --- /dev/null +++ b/zephcore/boards/nrf52840/heltec_t096/Kconfig.heltec_t096 @@ -0,0 +1,6 @@ +# Copyright (c) 2026 ZephCore +# +# SPDX-License-Identifier: MIT + +config BOARD_HELTEC_T096 + select SOC_NRF52840_QIAA diff --git a/zephcore/boards/nrf52840/heltec_t096/README.md b/zephcore/boards/nrf52840/heltec_t096/README.md new file mode 100644 index 0000000..2168b4c --- /dev/null +++ b/zephcore/boards/nrf52840/heltec_t096/README.md @@ -0,0 +1,70 @@ +# Heltec Mesh Node T096 + +Custom ZephCore board target for the Heltec Mesh Node T096. + +Build: + +```bash +west build -b heltec_t096 zephcore --pristine +``` + +## Hardware + +- MCU: nRF52840 +- Radio: SX1262 +- RF front-end: KCT8103L PA/FEM, official maximum LoRa output power up to 28+/-1 dBm +- GNSS: UC6580 + +## Confirmed Pinout + +Sources: MeshCore `variants/heltec_t096` for comparison, verified against the official Heltec `Mesh_Node_T096_V0.2` schematic. + +| Function | nRF52840 pin | Schematic net | ZephCore mapping | +| --- | --- | --- | --- | +| LoRa SCK | P1.08 | LoRa_SCK | `spi2` SCK | +| LoRa MISO | P0.14 | LoRa_MISO | `spi2` MISO | +| LoRa MOSI | P0.11 | LoRa_MOSI | `spi2` MOSI | +| LoRa NSS / CS | P0.05 | LoRa_NSS | `cs-gpios` | +| LoRa reset | P0.16 | LoRa_RST | `reset-gpios` | +| LoRa busy | P0.19 | LoRa_BUSY | `busy-gpios` | +| LoRa DIO1 | P0.21 | DIO1 | `dio1-gpios` | +| SX1262 DIO2 / FEM CPS | SX1262 DIO2 | PA_CPS | `dio2-tx-enable` | +| FEM enable | P0.12 | PA_CSD | `antenna-enable-gpios` | +| FEM TX select | P1.09 | PA_CTX | `tx-enable-gpios` | +| FEM rail enable | P0.30 | VFEM_Ctrl | fixed regulator `vfem_enable` | +| GNSS UART RX into MCU | P0.23 | GNSS_TX | `uart0` RX | +| GNSS UART TX from MCU | P0.25 | GNSS_RX | `uart0` TX | +| GNSS reset | P1.14 | GNSS_RST | `gps-reset` alias | +| GNSS power | P0.06 | VGNSS_CTRL | fixed regulator `gps_power` | +| GNSS PPS | P1.11 | PPS | documented, not consumed | +| LED | P0.28 | LED | `led0`, `lora-tx-led` | +| Button | P1.10 | Button | `sw0` | +| Battery ADC | P0.03 / AIN1 | ADC_IN | ADC channel 1 | +| Battery ADC enable | P1.15 | ADC_Ctrl | fixed regulator `vbat_enable` | + +## Not Enabled + +- Display: the schematic confirms FFC nets (`LEDA`, `RESET`, `RS`, `SDIN`, `SCLK`, `CS`) but not a controller node in this board port. +- External flash: the schematic shows `F_SPI_*` nets and a flash footprint, but the flash device and parameters are not confirmed. + +## T096 vs T114 Differences + +- LoRa SPI/control pins are different across SCK, MISO, MOSI, CS, reset, busy, and DIO1. +- T096 adds a KCT8103L PA/FEM path with `PA_CSD`, `PA_CTX`, `PA_CPS`, and `VFEM_Ctrl`; T114 uses SX1262 DIO2 RF switch without those MCU PA/FEM GPIOs. +- T096 GNSS is UC6580 at 115200 baud with `VGNSS_CTRL`, `GNSS_RST`, and `PPS`; T114 uses ATGM336H-style wiring at 9600 baud. +- T096 battery ADC is P0.03/AIN1 with enable P1.15; T114 battery ADC is P0.04/AIN2 with enable P0.06. +- T096 LED is P0.28 active-high; T114 LED is P1.03 active-low. +- T096 button is P1.10, matching T114's user button pin. + +## Hardware Smoke Test Plan + +1. Flash UF2 by double-tap reset and drag-drop. +2. Confirm USB CDC/logging appears. +3. Confirm BLE advertises as ZephCore/MeshCore companion. +4. Confirm MeshCore app pairing works. +5. Confirm SX1262 init succeeds with no reset, busy, or DIO1 errors. +6. Confirm RX starts. +7. Test low-power TX first. +8. Confirm PA/FEM control before testing higher TX power. +9. Test PA progressively. +10. Confirm GNSS only after radio and BLE are stable. diff --git a/zephcore/boards/nrf52840/heltec_t096/board.cmake b/zephcore/boards/nrf52840/heltec_t096/board.cmake new file mode 100644 index 0000000..3dc94fb --- /dev/null +++ b/zephcore/boards/nrf52840/heltec_t096/board.cmake @@ -0,0 +1,14 @@ +# Copyright (c) 2026 ZephCore +# +# SPDX-License-Identifier: MIT + +board_runner_args(jlink "--device=nRF52840_xxAA" "--speed=4000") +board_runner_args(pyocd "--target=nrf52840" "--frequency=4000000") + +set(OPENOCD_NRF5_SUBFAMILY "nrf52") + +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) +include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd-nrf5.board.cmake) +include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) +include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake) diff --git a/zephcore/boards/nrf52840/heltec_t096/board.conf b/zephcore/boards/nrf52840/heltec_t096/board.conf new file mode 100644 index 0000000..44bfc40 --- /dev/null +++ b/zephcore/boards/nrf52840/heltec_t096/board.conf @@ -0,0 +1,28 @@ +# Heltec Mesh Node T096 - nRF52840 + SX1262 + UC6580 GNSS +# Board-specific configuration +# +# Hardware: +# - nRF52840 SoC, SX1262 LoRa, KCT8103L PA/FEM +# - UC6580 GNSS on UART0 at 115200 baud +# - Battery ADC on AIN1 (P0.03), 390K/100K divider, enable P1.15 +# - I2C0 header bus (SDA=P0.07, SCL=P0.08) +# - LED: P0.28 (active-HIGH) +# - Button: P1.10 (active-LOW) +# - Display connector present but no controller enabled here +# - External SPI flash footprint present but device is not identified/enabled + +# Board identification (matches Arduino MeshCore variant name) +CONFIG_ZEPHCORE_BOARD_NAME="Heltec T096" + +# Device Information Service model name +CONFIG_BT_DIS_MODEL_NUMBER_STR="Heltec Mesh Node T096" + +# SoftDevice firmware ID (s140 v6.1.1) +CONFIG_ZEPHCORE_SD_FWID=0x00B6 + +# KCT8103L PA/FEM. MeshCore's T096 target uses 9 dBm SX1262 input for about +# 22 dBm at the antenna; keep ZephCore's boot default conservative. +CONFIG_ZEPHCORE_DEFAULT_TX_POWER_DBM=9 + +# Same KCT8103L-class Heltec PA path as the V4.3 boards. +CONFIG_ZEPHCORE_SX126X_HELTEC_REG_PATCH=y diff --git a/zephcore/boards/nrf52840/heltec_t096/board.yml b/zephcore/boards/nrf52840/heltec_t096/board.yml new file mode 100644 index 0000000..6a1e001 --- /dev/null +++ b/zephcore/boards/nrf52840/heltec_t096/board.yml @@ -0,0 +1,10 @@ +# Copyright (c) 2026 ZephCore +# +# SPDX-License-Identifier: MIT + +board: + name: heltec_t096 + full_name: Heltec Mesh Node T096 + vendor: heltec + socs: + - name: nrf52840 diff --git a/zephcore/boards/nrf52840/heltec_t096/heltec_t096_nrf52840-pinctrl.dtsi b/zephcore/boards/nrf52840/heltec_t096/heltec_t096_nrf52840-pinctrl.dtsi new file mode 100644 index 0000000..e175fee --- /dev/null +++ b/zephcore/boards/nrf52840/heltec_t096/heltec_t096_nrf52840-pinctrl.dtsi @@ -0,0 +1,67 @@ +/* + * Heltec Mesh Node T096 pin control definitions + * Copyright (c) 2026 ZephCore + * + * SPDX-License-Identifier: MIT + * + * Sources: + * - MeshCore variants/heltec_t096/variant.h and platformio.ini + * - Official Heltec Mesh_Node_T096_V0.2 schematic + * + * Confirmed T096 mappings: + * - SPI2 (SX1262 LoRa): SCK=P1.08, MOSI=P0.11, MISO=P0.14 + * - I2C0: SDA=P0.07, SCL=P0.08 + * - UART0 (UC6580 GNSS): TX=P0.25 -> GNSS_RX, RX=P0.23 <- GNSS_TX + */ + +&pinctrl { + spi2_default: spi2_default { + group1 { + psels = , + , + ; + }; + }; + + spi2_sleep: spi2_sleep { + group1 { + psels = , + , + ; + low-power-enable; + }; + }; + + i2c0_default: i2c0_default { + group1 { + psels = , + ; + }; + }; + + i2c0_sleep: i2c0_sleep { + group1 { + psels = , + ; + low-power-enable; + }; + }; + + uart0_default: uart0_default { + group1 { + psels = ; + }; + group2 { + psels = ; + bias-pull-up; + }; + }; + + uart0_sleep: uart0_sleep { + group1 { + psels = , + ; + low-power-enable; + }; + }; +}; diff --git a/zephcore/boards/nrf52840/heltec_t096/heltec_t096_nrf52840.dts b/zephcore/boards/nrf52840/heltec_t096/heltec_t096_nrf52840.dts new file mode 100644 index 0000000..6266059 --- /dev/null +++ b/zephcore/boards/nrf52840/heltec_t096/heltec_t096_nrf52840.dts @@ -0,0 +1,242 @@ +/* + * Heltec Mesh Node T096 - nRF52840 + SX1262 + UC6580 GNSS + * Copyright (c) 2026 ZephCore + * + * SPDX-License-Identifier: MIT + * + * Pin mappings are verified against the official Heltec + * Mesh_Node_T096_V0.2 schematic. MeshCore's heltec_t096 variant was used as + * a comparison source; the schematic is the source of truth for implemented + * nets in this DTS. + */ + +/dts-v1/; +#include +#include +#include +#include +#include "heltec_t096_nrf52840-pinctrl.dtsi" + +/ { + model = "Heltec Mesh Node T096"; + compatible = "heltec,t096"; + + chosen { + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,code-partition = &code_partition; + zephyr,console = &cdc_acm_uart; + zephyr,shell-uart = &cdc_acm_uart; + zephcore,gps-power = &gps_power; + }; + + aliases { + led0 = &led_white; + lora-tx-led = &led_white; + sw0 = &user_button; + lora0 = &lora; + watchdog0 = &wdt0; + gps-reset = &gps_reset_pin; + }; + + leds { + compatible = "gpio-leds"; + + /* Schematic net LED: P0.28 -> R25 -> LED2 -> GND, active-HIGH. */ + led_white: led_0 { + gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; + label = "White LED"; + }; + }; + + buttons: buttons { + compatible = "gpio-keys"; + + /* Schematic net Button: P1.10, switch to GND. */ + user_button: button_0 { + gpios = <&gpio1 10 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + zephyr,code = ; + label = "User Button"; + }; + }; + + user_btn_longpress: user_btn_longpress { + compatible = "zephyr,input-longpress"; + input = <&buttons>; + input-codes = ; + short-codes = ; + long-codes = ; + long-delay-ms = <1000>; + }; + + user_btn_multitap { + compatible = "zephcore,input-multi-tap"; + input-codes = ; + tap-codes = ; + tap-delay-ms = <400>; + }; + + /* + * Schematic net VGNSS_CTRL: P0.06 controls the VGNSS_3V3 rail. + * MeshCore defines PIN_GPS_EN_ACTIVE=LOW for this net. + */ + gps_power: gps-power { + compatible = "regulator-fixed"; + regulator-name = "gps-power"; + enable-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; + regulator-boot-on; + startup-delay-us = <10000>; + }; + + /* Schematic net GNSS_RST: P1.14 -> UC6580 RESETN, active-LOW. */ + gps_rst: gps-reset { + compatible = "gpio-leds"; + gps_reset_pin: gps_reset { + gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; + label = "GNSS Reset"; + }; + }; + + /* Schematic net VFEM_Ctrl: P0.30 enables U5, producing the Vfem rail. */ + vfem_enable: vfem-enable { + compatible = "regulator-fixed"; + regulator-name = "vfem-enable"; + enable-gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>; + regulator-boot-on; + startup-delay-us = <1000>; + }; + + /* Schematic net ADC_Ctrl: P1.15 enables the VBAT divider. */ + vbat_enable: vbat-enable { + compatible = "regulator-fixed"; + regulator-name = "vbat-enable"; + enable-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>; + }; + + zephyr,user { + io-channels = <&adc 1>; + /* + * Schematic: ADC_IN on P0.03/AIN1, divider R22=390K high side + * and R23=100K low side -> 4.9:1. With ADC_GAIN_1_6 and + * internal 0.6V ref, full-scale is 3600 mV. + */ + vbat-mv-multiplier = <17728>; + }; +}; + +®0 { + status = "okay"; +}; + +®1 { + regulator-initial-mode = ; +}; + +&adc { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + channel@1 { + reg = <1>; + zephyr,gain = "ADC_GAIN_1_6"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,input-positive = ; + zephyr,resolution = <12>; + }; +}; + +&gpiote { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&i2c0 { + compatible = "nordic,nrf-twim"; + status = "okay"; + clock-frequency = ; + pinctrl-0 = <&i2c0_default>; + pinctrl-1 = <&i2c0_sleep>; + pinctrl-names = "default", "sleep"; + + #include "../../common/sensors-i2c.dtsi" +}; + +&uart0 { + compatible = "nordic,nrf-uarte"; + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart0_default>; + pinctrl-1 = <&uart0_sleep>; + pinctrl-names = "default", "sleep"; + + gnss: gnss { + compatible = "gnss-nmea-generic"; + }; +}; + +/* SPI2 - SX1262 LoRa radio */ +&spi2 { + compatible = "nordic,nrf-spim"; + status = "okay"; + cs-gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; /* Schematic net LoRa_NSS */ + pinctrl-0 = <&spi2_default>; + pinctrl-1 = <&spi2_sleep>; + pinctrl-names = "default", "sleep"; + + lora: lora@0 { + compatible = "semtech,sx1262"; + reg = <0>; + spi-max-frequency = <8000000>; + + reset-gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; /* LoRa_RST */ + busy-gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>; /* LoRa_BUSY */ + dio1-gpios = <&gpio0 21 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>; /* DIO1 */ + + /* + * KCT8103L PA/FEM control: + * - PA_CSD P0.12 -> CSD, active-HIGH FEM enable. + * - PA_CTX P1.09 -> CTX, HIGH for TX in the existing ZephCore + * SX1262 tx-enable model. MeshCore uses the same net for + * TX/LNA-bypass control. + * - PA_CPS is not an MCU GPIO on T096; it is the SX1262 DIO2 + * net into the KCT8103L CPS pin, so use dio2-tx-enable. + */ + antenna-enable-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; /* PA_CSD */ + tx-enable-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; /* PA_CTX */ + dio2-tx-enable; /* PA_CPS */ + + dio3-tcxo-voltage = ; + tcxo-power-startup-delay-ms = <5>; + rx-boosted; + }; +}; + +/* + * External SPI flash footprint is present in the schematic (F_SPI_* nets), + * but the memory device and Zephyr-compatible parameters are not confirmed. + */ +&qspi { + status = "disabled"; +}; + +zephyr_udc0: &usbd { + compatible = "nordic,nrf-usbd"; + status = "okay"; + + cdc_acm_uart: cdc_acm_uart { + compatible = "zephyr,cdc-acm-uart"; + }; +}; + +/* SoftDevice s140 v6.1.1 flash layout (app@0x26000, bootloader@0xF4000) */ +#include "../../common/nrf52_partitions_sdv6.dtsi" +#include "../../common/nrf52_wakeup.dtsi" diff --git a/zephcore/boards/nrf52840/heltec_t096/heltec_t096_nrf52840.yaml b/zephcore/boards/nrf52840/heltec_t096/heltec_t096_nrf52840.yaml new file mode 100644 index 0000000..7126295 --- /dev/null +++ b/zephcore/boards/nrf52840/heltec_t096/heltec_t096_nrf52840.yaml @@ -0,0 +1,20 @@ +identifier: heltec_t096/nrf52840 +name: Heltec Mesh Node T096 +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb + - xtools +ram: 256 +flash: 1024 +supported: + - adc + - ble + - gpio + - i2c + - spi + - usb_device + - lora + - gnss +vendor: heltec diff --git a/zephcore/boards/nrf52840/heltec_t096/heltec_t096_nrf52840_defconfig b/zephcore/boards/nrf52840/heltec_t096/heltec_t096_nrf52840_defconfig new file mode 100644 index 0000000..98c300e --- /dev/null +++ b/zephcore/boards/nrf52840/heltec_t096/heltec_t096_nrf52840_defconfig @@ -0,0 +1,21 @@ +# Copyright (c) 2026 ZephCore +# SPDX-License-Identifier: MIT + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable hardware stack protection +CONFIG_HW_STACK_PROTECTION=y + +# Enable GPIO +CONFIG_GPIO=y + +# Enable UART driver +CONFIG_SERIAL=y + +# Enable console +CONFIG_CONSOLE=y + +# Build UF2 by default +CONFIG_BUILD_OUTPUT_UF2=y +CONFIG_USE_DT_CODE_PARTITION=y diff --git a/zephcore/boards/supported_boards.md b/zephcore/boards/supported_boards.md index 06f958b..592276e 100644 --- a/zephcore/boards/supported_boards.md +++ b/zephcore/boards/supported_boards.md @@ -19,12 +19,15 @@ xiao_nrf52840 lilygo_techo promicro_sx1262 heltec_t114 +heltec_t096 gat562_30s ``` > **RAK WisMesh Pocket** (WisBlock pocket): use `-b rak4631` — same board string and firmware as **RAK4631**. > > **Heltec T114** screenless build: append `boards/nrf52840/heltec_t114/no_display.conf` to `EXTRA_CONF_FILE` for units without the TFT module. +> +> **Heltec Mesh Node T096** (`heltec_t096`): nRF52840 with SX1262 + KCT8103L PA/FEM and UC6580 GNSS. The display connector and external SPI flash footprint are documented in the board notes but left disabled until the controller/device parameters are hardware-confirmed. ## ESP32