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core: restore upstream shape for the shared mesh core
- Mesh, Dispatcher, Packet, packet pool and the core headers rebuilt from Arduino MeshCore's text; ZephCore changes re-applied, each fenced `// ZEPHCORE:` (diff vs upstream: 4540 -> 1147 lines) - upstream header layout; MainBoard gains handleCommand/loop and the other upstream members; RNG::nextInt back in Utils.cpp - packet logging moved to the roles' log hooks (helpers/PacketLog.h) - zero-hop direct ACKs deduplicated and length-checked as upstream - RadioIncludes.h -> src/, LoRaConfig.h -> helpers/ - .editorconfig: shared files keep upstream formatting Verified: 10 role builds, per-function disassembly review, bench DM/ACK regression (T1000-E, Wio L1, XIAO S3 on 1.17.4) incl. via live repeater.
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@@ -76,7 +76,7 @@ extern "C" void bt_ctlr_assert_handle(char *file, uint32_t line)
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IS_ENABLED(CONFIG_ZEPHCORE_UI_DESIGN_JOYSTICK))
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/* Radio + mesh includes (shared header selects LR1110 or SX126x) */
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#include <mesh/RadioIncludes.h>
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#include <src/RadioIncludes.h>
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#if IS_ENABLED(CONFIG_ZEPHCORE_WIFI_OTA)
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#include "wifi_ota.h"
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@@ -463,7 +463,7 @@ static mesh::SX126xRadio lora_radio(lora_dev, zephyr_board);
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static mesh::ZephyrMillisecondClock ms_clock;
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static mesh::ZephyrRNG zephyr_rng;
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static mesh::SimpleMeshTables mesh_tables;
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static SimpleMeshTables mesh_tables;
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/* RepeaterMesh requires: board, radio, ms_clock, rng, rtc, tables */
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static RepeaterMesh repeater_mesh(zephyr_board, lora_radio, ms_clock, zephyr_rng, rtc_clock, mesh_tables);
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