From ee0892831f5cc78ac2f8e99d14a4fa83c5f255df Mon Sep 17 00:00:00 2001
From: liquidraver <504870+liquidraver@users.noreply.github.com>
Date: Thu, 9 Apr 2026 14:08:30 +0200
Subject: [PATCH] update supported boards

---
 README.md                               | 5 +++++
 zephcore/boards/example_board/README.md | 2 ++
 zephcore/boards/supported_boards.md     | 5 +++++
 3 files changed, 12 insertions(+)

diff --git a/README.md b/README.md
index 6ded040..6c468c0 100644
--- a/README.md
+++ b/README.md
@@ -35,6 +35,9 @@ Other benefits:
 | **XIAO ESP32-C6** | ESP32-C6 | SX1262 | BLE 5.0, Wi-Fi 6 |
 | **Station G2** | ESP32-S3 | SX1262 (+PA) | OLED (SH1106), GPS, 16MB flash, 8MB PSRAM |
 | **LilyGo TLoRa C6** | ESP32-C6 | SX1262 | BLE 5.0, Wi-Fi 6 |
+| **Heltec V3** | ESP32-S3 | SX1262 | OLED (SSD1306), 8MB flash |
+| **Heltec V4.2** | ESP32-S3 | SX1262 (+PA) | OLED (SSD1306), 16MB flash |
+| **Heltec V4.3** | ESP32-S3 | SX1262 (+PA) | OLED (SSD1306), 16MB flash |
 
 ### Other
 
@@ -90,6 +93,8 @@ Output binaries are in `build/zephyr/` -- `.hex`, `.uf2`, and DFU `.zip` as appl
 
 For exact `west build -b` board strings, flash methods, and special setup (MG24 pyocd, nRF54L15 `--no-sysbuild`), see the [Board Porting Guide](zephcore/boards/example_board/README.md).
 
+Heltec V3 note: console and shell are routed to `uart0` in ZephCore. Use the UART serial port for logs/CLI.
+
 ## Architecture Overview
 
 ```
diff --git a/zephcore/boards/example_board/README.md b/zephcore/boards/example_board/README.md
index a520712..433e3bf 100644
--- a/zephcore/boards/example_board/README.md
+++ b/zephcore/boards/example_board/README.md
@@ -35,6 +35,8 @@ SWD flash: `west flash` (requires J-Link, pyocd, or nrfjprog connected).
 | Heltec V4.2 (GC1109 PA)  | `west build -b heltec_wifi_lora32_v4/esp32s3/procpu zephcore`  | `west flash` |
 | Heltec V4.3 (KCT8103L PA) | `west build -b heltec_wifi_lora32_v43/esp32s3/procpu zephcore` | `west flash` |
 
+**Heltec V3 console:** ZephCore routes console/shell to `uart0` on V3. Use the UART serial port for boot logs and CLI.
+
 **Heltec V4.2 vs V4.3:** The hardware revision is printed on the PCB silkscreen. If
 unclear, check GPIO2's default pull: the V4.2 GC1109 PA has an internal pull-down
 (GPIO2 reads LOW at boot), while the V4.3 KCT8103L PA has an internal pull-up
diff --git a/zephcore/boards/supported_boards.md b/zephcore/boards/supported_boards.md
index 5ab08ca..52c1846 100644
--- a/zephcore/boards/supported_boards.md
+++ b/zephcore/boards/supported_boards.md
@@ -25,9 +25,14 @@ xiao_esp32c6/esp32c6/hpcore
 xiao_esp32s3/esp32s3/procpu
 lilygo_tlora_c6/esp32c6/hpcore
 station_g2/esp32s3/procpu
+heltec_wifi_lora32_v3/esp32s3/procpu
+heltec_wifi_lora32_v4/esp32s3/procpu
+heltec_wifi_lora32_v43/esp32s3/procpu
 ```
 
 > ESP32 boards require `west blobs fetch hal_espressif` before first build.
+>
+> Heltec V3 console/shell use `uart0` (UART serial) in ZephCore.
 
 ## MG24 (Silicon Labs)