# ============================================================================ # ZephCore — board.conf template # ============================================================================ # # Only for settings that cannot be derived from devicetree. Most hardware # features switch themselves on: # # Feature Enabled by # ─────────────── ────────────────────────────────────────────────── # Display DT chosen: zephyr,display # Buzzer + PWM DT nodelabel: buzzer (child of a "pwm-leds" node) # QSPI flash DT node: compatible "nordic,qspi-nor" # GPS DT nodelabel: gnss (a GNSS driver on a UART) # I2C sensors DT: boards/common/sensors-i2c.dtsi, probed at runtime # Hardware RTC DT: boards/common/rtc-i2c.dtsi, probed at boot # ESP32 PSRAM DT: psram0 size > 0 (zephcore/Kconfig.psram) # # Config chain (later files override earlier ones): # prj.conf → zephcore_common.conf → _common.conf # → esp32c3s3_common.conf (ESP32-S3/C3 only) → THIS FILE # → auto-included feature confs → your -DEXTRA_CONF_FILE # # The platform conf is chosen by the directory this board lives in # (boards/nrf52840/, nrf54l/, esp32/, mg24/, stm32wl/). There is nothing to # register in CMakeLists.txt. # # DO NOT duplicate settings from the common confs. # # ============================================================================ # ========== REQUIRED: Board Identity ========== # Name reported to the phone app and by the `board` CLI command. 39 characters # at most (static_assert in app/CompanionMesh.cpp). Match the Arduino MeshCore # variant's name where one exists. CONFIG_ZEPHCORE_BOARD_NAME="My Board" # BLE Device Information Service model name (shown in phone settings) CONFIG_BT_DIS_MODEL_NUMBER_STR="My Board v1" # ========== REQUIRED (nRF52 only): SoftDevice Firmware ID ========== # Written into the DFU .zip (adafruit-nrfutil --sd-req). It MUST match the # SoftDevice the board's Adafruit bootloader was flashed with, and the # partition include in the DTS must be the matching one: # # Arduino variant linker script FWID DTS include # nrf52840_s140_v6*.ld (app@0x26000) 0x00B6 nrf52_partitions_sdv6.dtsi # nrf52840_s140_v7*.ld (app@0x27000) 0x0123 nrf52_partitions_sdv7.dtsi # # The wrong pair puts the app at the wrong address: bootloop, no USB, no logs. # # CONFIG_ZEPHCORE_SD_FWID=0x00B6 # s140 v6.1.1 (RAK4631, ThinkNode M1/M3/M6, Heltec T114) # CONFIG_ZEPHCORE_SD_FWID=0x0123 # s140 v7.3.0 (XIAO nRF52840, Wio Tracker L1, T1000-E) # ========== OPTIONAL: Radio Type ========== # Default: ZEPHCORE_RADIO_NATIVE (Zephyr's SX126x driver: SX1261/62/68, LLCC68, # STM32WL). Nothing to set for those. Otherwise pick the one that matches the # lora node's compatible: # CONFIG_ZEPHCORE_RADIO_LR1110=y # semtech,lr1110 (LR1110/LR1120/LR1121) # CONFIG_ZEPHCORE_RADIO_LR2021=y # semtech,lr2021 # # SX127x goes through the loramac-node backend and needs the whole group # (source-only path, see boards/esp32/ttgo_lora32/): # CONFIG_LORA_MODULE_BACKEND_NATIVE=n # CONFIG_LORA_MODULE_BACKEND_LORAMAC_NODE=y # CONFIG_ZEPHCORE_RADIO_SX127X=y # CONFIG_ZEPHCORE_DEFAULT_TX_POWER_DBM=17 # ========== OPTIONAL: TX Power (boards with an external PA / FEM) ========== # Both default to 22 dBm, the SX1262 maximum. With a PA after the chip, the # chip must be held below the PA's maximum input: # CONFIG_ZEPHCORE_DEFAULT_TX_POWER_DBM=14 # CONFIG_ZEPHCORE_MAX_TX_POWER_DBM=19 # hard cap, enforced by the radio adapter # ========== OPTIONAL: Companion table sizes (RAM-bound boards) ========== # Defaults: 350 contacts, 40 channels, 256 queued offline messages. The # companion is limited by RAM, not flash, so the boards that override these # lower them. Values in the tree today: # nRF52840 350 (default) # nRF54L15 450 (nRF54LM20A: 510) # ESP32-C3 300 # ESP32-C6 280 # ESP32-S3 without PSRAM 130-140 (Heltec V3, Wireless Tracker) # Classic ESP32 50-140, with MAX_CHANNELS / OFFLINE_QUEUE_SIZE trimmed too # STM32WL (64 KB SRAM) 12 # Raise it only after reading the RAM figure in the build's memory report. # CONFIG_ZEPHCORE_MAX_CONTACTS=300 # CONFIG_ZEPHCORE_MAX_CHANNELS=8 # CONFIG_ZEPHCORE_OFFLINE_QUEUE_SIZE=128 # ========== OPTIONAL: Display heap (nRF52 / nRF54L with a large panel) ========== # The CFB framebuffer is k_malloc'd at boot. The 2048-byte default in # zephcore_common.conf fits a 128x64 OLED (1024 bytes). A larger panel fails # with -ENOMEM and stays blank, with no other symptom. # # Panel Resolution Framebuffer Heap in the tree # SSD1306/SH1106 128x64 1024 bytes 2048 (default) # ST7735 mono TFT 160x80 1600 bytes 4096 # SSD1681 e-paper 200x200 5000 bytes 6144 # # ESP32 and MG24 already have a heap of tens of KB and need no override. # CONFIG_HEAP_MEM_POOL_SIZE=6144 # ========== OPTIONAL: UI ========== # Boards whose long press emits KEY_ENTER: two confirms do not fit in the # default 500 ms window. # CONFIG_ZEPHCORE_UI_CONFIRM_WINDOW_MS=3000 # Larger built-in font for high-resolution panels (e-paper). # CONFIG_ZEPHCORE_DISPLAY_LARGE_FONT=y # ========== OPTIONAL: ESP32 ========== # esp32_common.conf assumes 4 MB flash. Set the real size; sysbuild copies it # to the MCUboot image (sysbuild/CMakeLists.txt). A mismatch hangs MCUboot at # "spi_flash: detected chip:". # CONFIG_ESPTOOLPY_FLASHSIZE_8MB=y # CONFIG_ESPTOOLPY_FLASHSIZE_16MB=y # # PSRAM is enabled from devicetree. Only the mode of an 8 MB octal part # (ESP32-S3R8) has to be stated; 2 MB quad (R2) is the upstream default. # CONFIG_SPIRAM_MODE_OCT=y # # Classic ESP32 PICO-D4 bootloops when the bootloader enables QIO flash mode. # CONFIG_ESPTOOLPY_FLASHMODE_DIO=y # CONFIG_ESPTOOLPY_FLASHMODE_QIO=n # # Boards with an I2C fuel gauge / PMU that reports state of charge (AXP2101). # CONFIG_FUEL_GAUGE=y # ========== DO NOT SET HERE ========== # CONFIG_ZEPHCORE_UI_DISPLAY / _UI_BUZZER / CONFIG_PWM / CONFIG_DISPLAY # follow devicetree (exception: a board whose panel is an optional # plug-in forces UI_DISPLAY=y, see boards/nrf52840/rak4631/) # CONFIG_SPI, CONFIG_LORA selected by the radio type # CONFIG_NORDIC_QSPI_NOR follows the nordic,qspi-nor node # CONFIG_ESP_SPIRAM / _SIZE follow the psram0 node # CONFIG_ZEPHCORE_LORA_RX_DUTY_CYCLE # boot default is off for every role; users switch it with `set rxduty` # CONFIG_ZEPHCORE_ROLE_*, CONFIG_LOG*, CONFIG_BT=n # role and debug policy come from boards/common/*.conf, never from a board # CONFIG_CLOCK_CONTROL_NRF_K32SRC_* # ignored since the Zephyr main pin; the 32.768 kHz source is devicetree # (&lfclk { k32src = "rc"; }, see board.overlay and docs/adr/0005)