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https://github.com/liquidraver/ZephCore.git
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liquidraver
a7d073900e
- Mesh, Dispatcher, Packet, packet pool and the core headers rebuilt from Arduino MeshCore's text; ZephCore changes re-applied, each fenced `// ZEPHCORE:` (diff vs upstream: 4540 -> 1147 lines) - upstream header layout; MainBoard gains handleCommand/loop and the other upstream members; RNG::nextInt back in Utils.cpp - packet logging moved to the roles' log hooks (helpers/PacketLog.h) - zero-hop direct ACKs deduplicated and length-checked as upstream - RadioIncludes.h -> src/, LoRaConfig.h -> helpers/ - .editorconfig: shared files keep upstream formatting Verified: 10 role builds, per-function disassembly review, bench DM/ACK regression (T1000-E, Wio L1, XIAO S3 on 1.17.4) incl. via live repeater.
18 lines
276 B
C++
18 lines
276 B
C++
/*
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* SPDX-License-Identifier: MIT
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* Zephyr implementation of MillisecondClock
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*/
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#pragma once
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#include <mesh/Dispatcher.h>
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namespace mesh {
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class ZephyrMillisecondClock : public MillisecondClock {
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public:
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unsigned long getMillis() override;
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};
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} /* namespace mesh */
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