Files
ZephCore/zephcore/adapters/clock
Pieter ViljoenandClaude Opus 5.5 db69172c66 rtc: clear the RV3028 12-hour bit at boot
ZephCore assumed 24-hour mode. If other firmware had left an RV3028 in
12-hour mode, the boot read masked the hours with 0x3F and could restore
a time up to twelve hours off, and each save's 24-hour hours byte meant
a different hour to the chip.

A new optional twelve-hour-bit = [register mask] names the bit, set on
the two RV3028 nodes to Control 2 12_24. Once the chip is cleanly
identified at boot, rtc_probe() clears a set bit and re-reads the time
block; the chip converts its own hours, as MeshCore relies on. If the
register cannot be read, reads FFh, or the clear or re-read fails, no
time is taken from the chip. DS3231/DS1307 are unchanged: a save's hours
byte already selects 24-hour mode there.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-08 07:19:25 -07:00
..
2026-02-20 12:43:13 +01:00
2026-10-02 23:10:09 +02:00
2026-10-02 23:10:09 +02:00