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ZephCore/zephcore/boards/example_board/board.conf
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2026-03-03 13:46:48 +01:00

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# ============================================================================
# ZephCore — Universal board.conf Template
# ============================================================================
#
# This file is ONLY for board-specific features. All common config (BLE stack,
# storage, input, LoRa, sensors, crypto) is in zephcore_common.conf.
# Platform-specific overrides are in <platform>_common.conf.
#
# Config chain (later files override earlier):
# prj.conf → zephcore_common.conf → <platform>_common.conf → THIS FILE
#
# Platform configs are auto-selected in CMakeLists.txt based on BOARD name:
# nrf52 → nrf52_common.conf (UF2, USB CDC, DLE, GNSS, RTT)
# nrf54l → nrf54l_common.conf (DLE, RTT)
# mg24 → mg24_common.conf (SiLabs blob stacks, larger heap)
# esp32 → esp32_common.conf (Espressif blob stacks, larger heap)
#
# DO NOT duplicate settings from the common configs!
#
# IMPORTANT: Register your board in CMakeLists.txt!
# Add "OR BOARD MATCHES \"your_board\"" to the correct platform detection
# line (~line 60-75) so the right <platform>_common.conf is auto-included.
#
# ============================================================================
# ========== REQUIRED: Board Identity ==========
# Name shown on phone app and OLED top bar
CONFIG_ZEPHCORE_BOARD_NAME="My Board"
# BLE Device Information Service model name (shown in phone settings)
CONFIG_BT_DIS_MODEL_NUMBER_STR="My Board v1"
# ========== Radio Type (auto-selected) ==========
# Default: RADIO_NATIVE (SX126x, SX127x, LLCC68, STM32WL) — no setting needed.
# Override ONLY for LR11xx boards:
# CONFIG_ZEPHCORE_RADIO_LR1110=y # Semtech LR11xx custom driver
# CONFIG_SPI=y # LR11xx needs SPI (native driver doesn't)
# ========== OPTIONAL: QSPI External Flash (nRF52840 only) ==========
# nrf52_common.conf defaults QSPI to =n (safer — avoids hang if chip missing).
# Uncomment if your board has QSPI flash for expanded storage.
#
# WARNING: If your board does NOT have a QSPI flash chip, the Nordic QSPI
# driver hangs forever at boot (k_sem_take K_FOREVER). Disable &qspi in
# your overlay. See boards/nrf52840/rak4631/ for an example.
# CONFIG_NORDIC_QSPI_NOR=y
# CONFIG_NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096
# ========== OPTIONAL: Display ==========
# Display subsystem is enabled universally in zephcore_common.conf.
# Display DRIVERS auto-select from the DT "compatible" string.
# No board.conf changes needed — just add the display node to your overlay.
#
# To add a display:
# 1. Add the display node to your board.overlay (see examples there)
# 2. Set zephyr,display = &your_display; in the "chosen" block
# 3. That's it — driver, CFB, and UI all auto-enable
#
# HEAP WARNING: The CFB framebuffer is allocated via k_malloc at boot.
# The default heap (2048 in zephcore_common.conf) fits 128x64 OLEDs.
# Displays larger than 128x64 WILL fail silently (-ENOMEM, blank screen).
# Override the heap for your display resolution:
# 200x200 (SSD1681): CONFIG_HEAP_MEM_POOL_SIZE=6144
# 296x128 (SSD1680): CONFIG_HEAP_MEM_POOL_SIZE=6144
# On RAM-constrained MCUs (nRF52840), you may also need to shrink the
# RTT buffer: CONFIG_SEGGER_RTT_BUFFER_SIZE_UP=1024 (saves 3KB).
#
# To DISABLE display on a board WITHOUT a screen (enables LED heartbeat):
# CONFIG_ZEPHCORE_UI_DISPLAY=n
# The heartbeat LED (led0 alias) only blinks when display is disabled
# (HAS_HEARTBEAT_LED requires !CONFIG_ZEPHCORE_UI_DISPLAY).
# CONFIG_ZEPHCORE_UI_DISPLAY=n
# ========== OPTIONAL: Buzzer ==========
# Uncomment if your board has a piezo buzzer on a PWM pin.
# CONFIG_PWM=y
# ========== OPTIONAL: UART Async API (nRF52840 GPS boards) ==========
# Enable this if your board has a GPS module on UART with deferred-init
# (i.e., GPS power is controlled by external GPIOs, not the GNSS driver).
#
# WHY: The nRF52840 UARTE is DMA-based. The default ISR modem backend
# emulates byte-by-byte interrupts on top of DMA, which breaks when GPS
# data arrives before the ISR handler is enabled (GPS transmits during
# the boot delay → overrun → modem_chat sees nothing).
#
# The async backend uses native UARTE DMA, which is more robust for GPS
# modules that start transmitting before the software is ready to listen.
#
# WHEN TO ENABLE:
# - Your board uses quectel,lc76g with zephyr,deferred-init (e.g., T1000-E)
# - GPS power is managed by external GPIOs in ZephyrGPSManager
# - GPS module starts transmitting before modem_pipe_open() is called
#
# WHEN NOT NEEDED:
# - luatos,air530z driver (manages power internally via on-off-gpios)
# - GPS at 9600 baud (slow enough for ISR backend)
# - Boards where the GNSS driver controls power (no deferred-init)
#
# CONFIG_UART_ASYNC_API=y
# ========== OPTIONAL: Platform-Specific Overrides ==========
#
# --- nRF52840 ---
# CRITICAL: SoftDevice version determines the app start address!
# Check your board's Arduino platformio.ini for which linker script it uses:
# nrf52840_s140_v6*.ld → s140 v6.1.1, app@0x26000, FWID=0x00B6
# nrf52840_s140_v7*.ld → s140 v7.3.0, app@0x27000, FWID=0x0123
# Your board.overlay partition table MUST match (see Section 4 in board.overlay).
# Wrong address = bootloop / bricked device with no USB/BLE/logs.
# CONFIG_ZEPHCORE_SD_FWID=0x00B6 # SoftDevice firmware ID (s140 v6.1.1)
# CONFIG_ZEPHCORE_SD_FWID=0x0123 # SoftDevice firmware ID (s140 v7.3.0)
#
# --- MG24 (Silicon Labs) ---
# Requires: west blobs fetch hal_silabs (before first build)
# No additional board.conf options typically needed.
#
# --- nRF54L15 ---
# No additional board.conf options typically needed.
# Build with: west build -b <board>/nrf54l15/cpuapp zephcore --no-sysbuild
#
# --- ESP32 ---
# esp32_common.conf defaults to 4MB flash. Override only for boards with more:
# CONFIG_ESPTOOLPY_FLASHSIZE_16MB=y # Station G2 (16MB flash)
# ========== OPTIONAL: Max Contacts Override ==========
# prod.conf sets MAX_CONTACTS=800 (sized for nRF52840's 256KB SRAM).
# RAM-constrained boards MUST override here. Approximate safe limits:
# nRF52840: 800 (default, no override needed)
# ESP32-C6: 800 (default, no override needed)
# MG24: 650 (Silabs BLE blob needs 32KB heap)
# nRF54L15: 450 (FLPR core reserves 68KB SRAM)
# ESP32-C3: 300 (limited DRAM)
# CONFIG_ZEPHCORE_MAX_CONTACTS=450
# ========== OPTIONAL: RX Duty Cycle ==========
# Disabled by default in zephcore_common.conf because the LR1110 cannot lock
# on mid-preamble, causing packet loss with duty-cycled RX.
# SX1262/LLCC68 boards handle duty cycle fine — enable for battery savings:
# CONFIG_ZEPHCORE_LORA_RX_DUTY_CYCLE=y