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https://github.com/liquidraver/ZephCore.git
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liquidraver
a7d073900e
- Mesh, Dispatcher, Packet, packet pool and the core headers rebuilt from Arduino MeshCore's text; ZephCore changes re-applied, each fenced `// ZEPHCORE:` (diff vs upstream: 4540 -> 1147 lines) - upstream header layout; MainBoard gains handleCommand/loop and the other upstream members; RNG::nextInt back in Utils.cpp - packet logging moved to the roles' log hooks (helpers/PacketLog.h) - zero-hop direct ACKs deduplicated and length-checked as upstream - RadioIncludes.h -> src/, LoRaConfig.h -> helpers/ - .editorconfig: shared files keep upstream formatting Verified: 10 role builds, per-function disassembly review, bench DM/ACK regression (T1000-E, Wio L1, XIAO S3 on 1.17.4) incl. via live repeater.
25 lines
1011 B
C++
25 lines
1011 B
C++
#pragma once
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#include <mesh/Dispatcher.h>
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// ZEPHCORE: the queues and the pool are static and live in the .cpp — no heap in
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// the packet path. Pool and queue sizes are compile-time (32 each).
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class StaticPoolPacketManager : public mesh::PacketManager {
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public:
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mesh::Packet* allocNew() override;
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void free(mesh::Packet* packet) override;
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void queueOutbound(mesh::Packet* packet, uint8_t priority, uint32_t scheduled_for) override;
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mesh::Packet* getNextOutbound(uint32_t now) override;
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int getOutboundCount(uint32_t now) const override;
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int getOutboundTotal() const override;
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int getFreeCount() const override;
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mesh::Packet* getOutboundByIdx(int i) override;
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mesh::Packet* removeOutboundByIdx(int i) override;
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// ZEPHCORE: no inbound queue (see mesh::PacketManager); schedule access instead.
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uint32_t getOutboundSchedule(int i) const override;
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bool rescheduleOutbound(int i, uint32_t new_scheduled_for) override;
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uint8_t peekNextOutboundPriority(uint32_t now) const override;
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};
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