mirror of
https://github.com/liquidraver/ZephCore.git
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77 lines
2.4 KiB
Plaintext
77 lines
2.4 KiB
Plaintext
/*
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* SPDX-License-Identifier: Apache-2.0
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*
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* RAK6421 WisBlock Pi HAT + RAK13300/RAK13302 (SX1262), IO Slot 1.
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* Auto-paired with rak6421.conf. Defines the native_linux SPI/GPIO controllers
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* + SX1262 node on top of linux_common.overlay's platform infra.
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*
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* Works on any Pi that exposes the 40-pin header on gpiochip0 (Pi 2/3/4/Zero 2).
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* Pi 5 moved it to gpiochip4 — use rak6421_pi5.overlay instead.
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*
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* Pins + clock mirror the authoritative meshtasticd config
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* (bin/config.d/lora-RAK6421-13300-slot1.yaml), BCM numbering:
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* CS = GPIO 8 (spidev0.0 CE0, hardware CS)
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* DIO1 = GPIO 22 (IO6)
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* RESET = GPIO 16 (IO4)
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* BUSY = GPIO 24 (IO5)
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* DIO2 drives the antenna RF switch (DIO2_AS_RF_SWITCH);
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* DIO3 powers a 1.8V TCXO (DIO3_TCXO_VOLTAGE);
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* Enable_Pins 12 + 13 are held HIGH to enable the module's RF front-end
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* (driven via GPIO hogs below — needs CONFIG_GPIO_HOGS=y, set in rak6421.conf).
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*
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* NOTE: hardware-untested in ZephCore (only the Femtofox is verified). The
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* RAK13302 (1W SKY66122) additionally wants a PA gain table that ZephCore's
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* SX126x driver does not expose; this overlay drives the 13300 correctly and
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* the 13302 at default (non-boosted) PA.
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*/
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#include <zephyr/dt-bindings/gpio/gpio.h>
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#include <zephyr/dt-bindings/lora/sx126x.h>
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/ {
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aliases {
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lora0 = &lora_sx1262;
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};
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zephcore_gpio0: zephcore_gpio0 {
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status = "okay";
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compatible = "zephcore,gpio-native-linux";
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gpio-controller;
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gpio-chip = "/dev/gpiochip0";
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ngpios = <64>;
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#gpio-cells = <2>;
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/* RAK6421 Enable_Pins (meshtasticd): held high at boot to enable
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* the module / RF front-end. */
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rak6421_enable {
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gpio-hog;
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gpios = <12 GPIO_ACTIVE_HIGH>, <13 GPIO_ACTIVE_HIGH>;
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output-high;
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};
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};
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zephcore_spi0: zephcore_spi0 {
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status = "okay";
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compatible = "zephcore,spi-native-linux";
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spi-dev = "/dev/spidev0.0";
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clock-frequency = <2000000>;
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spi-mode = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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/* SPI CE0 = BCM GPIO 8, driven as a regular GPIO. */
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cs-gpios = <&zephcore_gpio0 8 GPIO_ACTIVE_LOW>;
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lora_sx1262: lora@0 {
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compatible = "semtech,sx1262";
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reg = <0>;
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spi-max-frequency = <2000000>;
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reset-gpios = <&zephcore_gpio0 16 GPIO_ACTIVE_LOW>;
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busy-gpios = <&zephcore_gpio0 24 GPIO_ACTIVE_HIGH>;
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dio1-gpios = <&zephcore_gpio0 22 GPIO_ACTIVE_HIGH>;
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dio2-tx-enable;
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dio3-tcxo-voltage = <SX126X_DIO3_TCXO_1V8>;
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tcxo-power-startup-delay-ms = <5>;
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};
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};
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};
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