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53 lines
2.0 KiB
Plaintext
53 lines
2.0 KiB
Plaintext
# nRF52 Platform Configuration
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# Included by all nRF52-based boards (RAK4631, Wio Tracker, T1000-E, Ikoka Nano, etc.)
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# Only contains nRF52-specific settings — common BLE/Storage/Input is in zephcore_common.conf
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#
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# Include order: prj.conf → zephcore_common.conf → nrf52_common.conf → <board>/board.conf
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# ========== Build Output (nRF52 specific) ==========
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CONFIG_BUILD_OUTPUT_UF2=y
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CONFIG_USE_DT_CODE_PARTITION=y
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# ========== USB CDC ACM (nRF52 USB) ==========
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CONFIG_USB_DEVICE_STACK_NEXT=y
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CONFIG_CDC_ACM_SERIAL_INITIALIZE_AT_BOOT=y
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CONFIG_CDC_ACM_SERIAL_PRODUCT_STRING="ZephCore"
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CONFIG_UART_LINE_CTRL=y
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# ========== BLE: nRF52-specific controller settings ==========
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# TX power: +4 dBm (Zephyr open-source BLE controller)
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CONFIG_BT_CTLR_TX_PWR_PLUS_4=y
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# Data Length Extension — controller-side max (host-side in zephcore_common.conf)
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CONFIG_BT_CTLR_DATA_LENGTH_MAX=251
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# Coded PHY — enable in nRF LL controller (host auto-request in zephcore_common.conf)
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CONFIG_BT_CTLR_PHY_CODED=y
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# ========== Flash: nRF52-specific ==========
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# Partial erase — splits 4KB page erase into small sub-erases that fit
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# between BLE connection events. Without this, the flash driver waits for
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# an ~85ms gap in BLE activity (ticker sync) which never comes during an
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# active connection, freezing the system on the first flash write.
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CONFIG_SOC_FLASH_NRF_PARTIAL_ERASE=y
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# QSPI flash — disabled by default (safer — avoids hang if chip missing).
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# Boards with QSPI (Wio Tracker L1) override in board.conf.
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CONFIG_NORDIC_QSPI_NOR=n
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# ========== Storage ==========
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# BLE bonds via file-based settings on LittleFS (replaces NVS).
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CONFIG_NVS=n
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CONFIG_SETTINGS_NVS=n
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CONFIG_SETTINGS_FILE=y
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CONFIG_SETTINGS_FILE_PATH="/lfs/settings"
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# ========== SEGGER RTT (J-Link debug) ==========
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# RTT log backend is in boards/common/logging.conf (only included for debug builds).
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CONFIG_USE_SEGGER_RTT=y
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CONFIG_SEGGER_RTT_BUFFER_SIZE_UP=4096
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# ========== Debug ==========
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CONFIG_ASSERT=y
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CONFIG_BT_CTLR_ASSERT_HANDLER=y
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