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Pieter ViljoenandClaude Opus 5.5
26217825b3
rtc_time_block() wrote the weekday as a number 0-6 (Sunday 0) for every RTC. The RX8130CE's WEEK register (13h) is one-hot: Epson ETM50E-10 14.1.2, Table 15, p. 27, Sunday 01h to Saturday 40h, with no more than one bit set. So each sync wrote Sunday as no day, Monday as Sunday, and Wednesday, Friday and Saturday as two days at once. ZephCore never reads the weekday back, so its time and date were unaffected. A new boolean descriptor property, weekday-one-hot, is set on the RX8130CE node in rtc-i2c.dtsi, and rtc_time_block() writes BIT(dow) where it is set. That is the encoding of Zephyr's rtc_rx8130ce.c. The DS3231, PCF8563 and RV3028 keep 0-6, as Zephyr's drivers for them write it. The binding and comments no longer call the whole block BCD. meshtracker_x1's YSN8900 sets it too. The board already uses the RX8900 register map for it, and the RX8900's WEEK register (03h) is one-hot: Epson ETM45E-11 8.2.2, Table 15, p. 16. The YSN8900's own data sheet has no register map, and its programming guide is not available. The same defect and fix as meshcore-dev/MeshCore#3550. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>