mirror of
https://github.com/liquidraver/ZephCore.git
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142 lines
6.9 KiB
Plaintext
142 lines
6.9 KiB
Plaintext
# ============================================================================
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# ZephCore — board.conf template
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# ============================================================================
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#
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# Only for settings that cannot be derived from devicetree. Most hardware
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# features switch themselves on:
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#
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# Feature Enabled by
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# ─────────────── ──────────────────────────────────────────────────
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# Display DT chosen: zephyr,display
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# Buzzer + PWM DT nodelabel: buzzer (child of a "pwm-leds" node)
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# QSPI flash DT node: compatible "nordic,qspi-nor"
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# GPS DT nodelabel: gnss (a GNSS driver on a UART)
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# I2C sensors DT: boards/common/sensors-i2c.dtsi, probed at runtime
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# Hardware RTC DT: boards/common/rtc-i2c.dtsi, probed at boot
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# ESP32 PSRAM DT: psram0 size > 0 (zephcore/Kconfig.psram)
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#
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# Config chain (later files override earlier ones):
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# prj.conf → zephcore_common.conf → <platform>_common.conf
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# → esp32c3s3_common.conf (ESP32-S3/C3 only) → THIS FILE
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# → auto-included feature confs → your -DEXTRA_CONF_FILE
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#
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# The platform conf is chosen by the directory this board lives in
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# (boards/nrf52840/, nrf54l/, esp32/, mg24/, stm32wl/). There is nothing to
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# register in CMakeLists.txt.
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#
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# DO NOT duplicate settings from the common confs.
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#
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# ============================================================================
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# ========== REQUIRED: Board Identity ==========
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# Name reported to the phone app and by the `board` CLI command. 39 characters
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# at most (static_assert in app/CompanionMesh.cpp). Match the Arduino MeshCore
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# variant's name where one exists.
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CONFIG_ZEPHCORE_BOARD_NAME="My Board"
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# BLE Device Information Service model name (shown in phone settings)
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CONFIG_BT_DIS_MODEL_NUMBER_STR="My Board v1"
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# ========== REQUIRED (nRF52 only): SoftDevice Firmware ID ==========
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# Written into the DFU .zip (adafruit-nrfutil --sd-req). It MUST match the
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# SoftDevice the board's Adafruit bootloader was flashed with, and the
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# partition include in the DTS must be the matching one:
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#
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# Arduino variant linker script FWID DTS include
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# nrf52840_s140_v6*.ld (app@0x26000) 0x00B6 nrf52_partitions_sdv6.dtsi
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# nrf52840_s140_v7*.ld (app@0x27000) 0x0123 nrf52_partitions_sdv7.dtsi
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#
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# The wrong pair puts the app at the wrong address: bootloop, no USB, no logs.
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#
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# CONFIG_ZEPHCORE_SD_FWID=0x00B6 # s140 v6.1.1 (RAK4631, ThinkNode M1/M3/M6, Heltec T114)
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# CONFIG_ZEPHCORE_SD_FWID=0x0123 # s140 v7.3.0 (XIAO nRF52840, Wio Tracker L1, T1000-E)
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# ========== OPTIONAL: Radio Type ==========
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# Default: ZEPHCORE_RADIO_NATIVE (Zephyr's SX126x driver: SX1261/62/68, LLCC68,
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# STM32WL). Nothing to set for those. Otherwise pick the one that matches the
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# lora node's compatible:
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# CONFIG_ZEPHCORE_RADIO_LR1110=y # semtech,lr1110 (LR1110/LR1120/LR1121)
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# CONFIG_ZEPHCORE_RADIO_LR2021=y # semtech,lr2021
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#
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# SX127x goes through the loramac-node backend and needs the whole group
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# (source-only path, see boards/esp32/ttgo_lora32/):
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# CONFIG_LORA_MODULE_BACKEND_NATIVE=n
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# CONFIG_LORA_MODULE_BACKEND_LORAMAC_NODE=y
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# CONFIG_ZEPHCORE_RADIO_SX127X=y
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# CONFIG_ZEPHCORE_DEFAULT_TX_POWER_DBM=17
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# ========== OPTIONAL: TX Power (boards with an external PA / FEM) ==========
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# Both default to 22 dBm, the SX1262 maximum. With a PA after the chip, the
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# chip must be held below the PA's maximum input:
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# CONFIG_ZEPHCORE_DEFAULT_TX_POWER_DBM=14
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# CONFIG_ZEPHCORE_MAX_TX_POWER_DBM=19 # hard cap, enforced by the radio adapter
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# ========== OPTIONAL: Companion table sizes (RAM-bound boards) ==========
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# Defaults: 350 contacts, 40 channels, 256 queued offline messages. The
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# companion is limited by RAM, not flash, so the boards that override these
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# lower them. Values in the tree today:
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# nRF52840 350 (default)
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# nRF54L15 450 (nRF54LM20A: 510)
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# ESP32-C3 300
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# ESP32-C6 280
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# ESP32-S3 without PSRAM 130-140 (Heltec V3, Wireless Tracker)
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# Classic ESP32 50-140, with MAX_CHANNELS / OFFLINE_QUEUE_SIZE trimmed too
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# STM32WL (64 KB SRAM) 12
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# Raise it only after reading the RAM figure in the build's memory report.
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# CONFIG_ZEPHCORE_MAX_CONTACTS=300
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# CONFIG_ZEPHCORE_MAX_CHANNELS=8
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# CONFIG_ZEPHCORE_OFFLINE_QUEUE_SIZE=128
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# ========== OPTIONAL: Display heap (nRF52 / nRF54L with a large panel) ==========
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# The CFB framebuffer is k_malloc'd at boot. The 2048-byte default in
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# zephcore_common.conf fits a 128x64 OLED (1024 bytes). A larger panel fails
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# with -ENOMEM and stays blank, with no other symptom.
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#
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# Panel Resolution Framebuffer Heap in the tree
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# SSD1306/SH1106 128x64 1024 bytes 2048 (default)
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# ST7735 mono TFT 160x80 1600 bytes 4096
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# SSD1681 e-paper 200x200 5000 bytes 6144
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#
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# ESP32 and MG24 already have a heap of tens of KB and need no override.
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# CONFIG_HEAP_MEM_POOL_SIZE=6144
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# ========== OPTIONAL: UI ==========
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# Boards whose long press emits KEY_ENTER: two confirms do not fit in the
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# default 500 ms window.
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# CONFIG_ZEPHCORE_UI_CONFIRM_WINDOW_MS=3000
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# Larger built-in font for high-resolution panels (e-paper).
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# CONFIG_ZEPHCORE_DISPLAY_LARGE_FONT=y
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# ========== OPTIONAL: ESP32 ==========
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# esp32_common.conf assumes 4 MB flash. Set the real size; sysbuild copies it
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# to the MCUboot image (sysbuild/CMakeLists.txt). A mismatch hangs MCUboot at
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# "spi_flash: detected chip:".
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# CONFIG_ESPTOOLPY_FLASHSIZE_8MB=y
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# CONFIG_ESPTOOLPY_FLASHSIZE_16MB=y
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#
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# PSRAM is enabled from devicetree. Only the mode of an 8 MB octal part
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# (ESP32-S3R8) has to be stated; 2 MB quad (R2) is the upstream default.
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# CONFIG_SPIRAM_MODE_OCT=y
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#
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# Classic ESP32 PICO-D4 bootloops when the bootloader enables QIO flash mode.
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# CONFIG_ESPTOOLPY_FLASHMODE_DIO=y
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# CONFIG_ESPTOOLPY_FLASHMODE_QIO=n
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#
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# Boards with an I2C fuel gauge / PMU that reports state of charge (AXP2101).
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# CONFIG_FUEL_GAUGE=y
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# ========== DO NOT SET HERE ==========
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# CONFIG_ZEPHCORE_UI_DISPLAY / _UI_BUZZER / CONFIG_PWM / CONFIG_DISPLAY
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# follow devicetree (exception: a board whose panel is an optional
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# plug-in forces UI_DISPLAY=y, see boards/nrf52840/rak4631/)
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# CONFIG_SPI, CONFIG_LORA selected by the radio type
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# CONFIG_NORDIC_QSPI_NOR follows the nordic,qspi-nor node
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# CONFIG_ESP_SPIRAM / _SIZE follow the psram0 node
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# CONFIG_ZEPHCORE_LORA_RX_DUTY_CYCLE
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# boot default is off for every role; users switch it with `set rxduty`
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# CONFIG_ZEPHCORE_ROLE_*, CONFIG_LOG*, CONFIG_BT=n
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# role and debug policy come from boards/common/*.conf, never from a board
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# CONFIG_CLOCK_CONTROL_NRF_K32SRC_*
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# ignored since the Zephyr main pin; the 32.768 kHz source is devicetree
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# (&lfclk { k32src = "rc"; }, see board.overlay and docs/adr/0005)
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