diff --git a/include/config_gpio.h b/include/config_gpio.h index fecf99526..09155ee2d 100644 --- a/include/config_gpio.h +++ b/include/config_gpio.h @@ -13,63 +13,33 @@ // // See LICENSE.txt for the text of the license. //----------------------------------------------------------------------------- -// GPIO pin mapping for the Proxmark3 +// GPIO pin mapping for the Proxmark[?] //----------------------------------------------------------------------------- -#ifndef __CONFIG_GPIO_H -#define __CONFIG_GPIO_H +#ifndef CONFIG_GPIO_H_ +#define CONFIG_GPIO_H_ -#define GPIO_LED_A AT91C_PIO_PA0 -#define GPIO_PA1 AT91C_PIO_PA1 -#ifndef LED_ORDER_PM3EASY -#define GPIO_LED_D AT91C_PIO_PA2 +// Select a GPIO map config for building device. + +/** + * TODO DXL: + * After the complete migration, please select different GPIO configurations according to the compilation target, + * and do not include all of them! + */ + +#ifdef PM5 +#include "config_gpio_proxmark5.h" +#endif +#include "config_gpio_proxmark3.h" // TODO DXL: For test... include it. + +/* + +#ifdef PM5 +#include "config_gpio_proxmark5.h" #else -#define GPIO_LED_B AT91C_PIO_PA2 +#include "config_gpio_proxmark3.h" #endif -#define GPIO_NVDD_ON AT91C_PIO_PA3 -#define GPIO_FPGA_NINIT AT91C_PIO_PA4 -#define GPIO_PA5 AT91C_PIO_PA5 -#define GPIO_PCK0 AT91C_PA6_PCK0 -#define GPIO_LRST AT91C_PIO_PA7 -#ifndef LED_ORDER_PM3EASY -#define GPIO_LED_B AT91C_PIO_PA8 -#else -#define GPIO_LED_D AT91C_PIO_PA8 -#endif -#define GPIO_LED_C AT91C_PIO_PA9 -// defines for flash mem, or rdv40 ? -// flashmem hooked on PA10 -//#define GPIO_NCS2 AT91C_PIO_PA1 -#define GPIO_NCS2 AT91C_PA10_NPCS2 -#define GPIO_NCS0 AT91C_PA11_NPCS0 +*/ -#define GPIO_MISO AT91C_PA12_MISO -#define GPIO_MOSI AT91C_PA13_MOSI -#define GPIO_SPCK AT91C_PA14_SPCK -#define GPIO_SSC_FRAME AT91C_PA15_TF -#define GPIO_SSC_CLK AT91C_PA16_TK -#define GPIO_SSC_DOUT AT91C_PA17_TD -#define GPIO_SSC_DIN AT91C_PA18_RD -#define GPIO_MUXSEL_HIPKD AT91C_PIO_PA19 -#define GPIO_MUXSEL_LOPKD AT91C_PIO_PA20 - -// RDV40 has no HIRAW/LORAW, its used for FPC -#define GPIO_MUXSEL_HIRAW AT91C_PIO_PA21 -#define GPIO_MUXSEL_LORAW AT91C_PIO_PA22 - -#define GPIO_BUTTON AT91C_PIO_PA23 -#define GPIO_USB_PU AT91C_PIO_PA24 -#define GPIO_RELAY AT91C_PIO_PA25 -#if defined XC3 -#define GPIO_FPGA_SWITCH AT91C_PIO_PA26 -#else -#define GPIO_FPGA_ON AT91C_PIO_PA26 -#endif -#define GPIO_FPGA_DONE AT91C_PIO_PA27 -#define GPIO_FPGA_NPROGRAM AT91C_PIO_PA28 -#define GPIO_FPGA_CCLK AT91C_PIO_PA29 -#define GPIO_FPGA_DIN AT91C_PIO_PA30 -#define GPIO_FPGA_DOUT AT91C_PIO_PA31 - -#endif +#endif // CONFIG_GPIO_H_ diff --git a/include/config_gpio_proxmark3.h b/include/config_gpio_proxmark3.h new file mode 100644 index 000000000..a89f472a3 --- /dev/null +++ b/include/config_gpio_proxmark3.h @@ -0,0 +1,81 @@ +//----------------------------------------------------------------------------- +// Copyright (C) Proxmark3 contributors. See AUTHORS.md for details. +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// See LICENSE.txt for the text of the license. +//----------------------------------------------------------------------------- +// GPIO pin mapping for the Proxmark3 +//----------------------------------------------------------------------------- + +#ifndef CONFIG_GPIO_PROXMARK3_H_ +#define CONFIG_GPIO_PROXMARK3_H_ + +#include "at91sam7s512.h" + +#define GPIO_LED_A AT91C_PIO_PA0 +#ifndef LED_ORDER_PM3EASY +#define GPIO_LED_D AT91C_PIO_PA2 +#else +#define GPIO_LED_B AT91C_PIO_PA2 +#endif +#define GPIO_NVDD_ON AT91C_PIO_PA3 +#define GPIO_FPGA_NINIT AT91C_PIO_PA4 +#define GPIO_PA5 AT91C_PIO_PA5 +#define GPIO_PCK0 AT91C_PA6_PCK0 +#define GPIO_LRST AT91C_PIO_PA7 +#ifndef LED_ORDER_PM3EASY +#define GPIO_LED_B AT91C_PIO_PA8 +#else +#define GPIO_LED_D AT91C_PIO_PA8 +#endif +#define GPIO_LED_C AT91C_PIO_PA9 + +// defines for i2c, moved from 'i2c.c' to here. +#define GPIO_I2C_RST AT91C_PIO_PA1 +#define GPIO_I2C_SCL AT91C_PIO_PA5 +#define GPIO_I2C_SDA AT91C_PIO_PA7 + +// defines for flash mem, or rdv40 ? +// flashmem hooked on PA10 +//#define GPIO_NCS2 AT91C_PIO_PA1 +#define GPIO_NCS2 AT91C_PA10_NPCS2 +#define GPIO_NCS0 AT91C_PA11_NPCS0 + +#define GPIO_MISO AT91C_PA12_MISO +#define GPIO_MOSI AT91C_PA13_MOSI +#define GPIO_SPCK AT91C_PA14_SPCK +#define GPIO_SSC_FRAME AT91C_PA15_TF +#define GPIO_SSC_CLK AT91C_PA16_TK +#define GPIO_SSC_DOUT AT91C_PA17_TD +#define GPIO_SSC_DIN AT91C_PA18_RD +#define GPIO_MUXSEL_HIPKD AT91C_PIO_PA19 +#define GPIO_MUXSEL_LOPKD AT91C_PIO_PA20 + +// RDV40 has no HIRAW/LORAW, its used for FPC +#define GPIO_MUXSEL_HIRAW AT91C_PIO_PA21 +#define GPIO_MUXSEL_LORAW AT91C_PIO_PA22 + +#define GPIO_BUTTON AT91C_PIO_PA23 +#define GPIO_USB_PU AT91C_PIO_PA24 +#define GPIO_RELAY AT91C_PIO_PA25 +#if defined XC3 +#define GPIO_FPGA_SWITCH AT91C_PIO_PA26 +#else +#define GPIO_FPGA_ON AT91C_PIO_PA26 +#endif +#define GPIO_FPGA_DONE AT91C_PIO_PA27 +#define GPIO_FPGA_NPROGRAM AT91C_PIO_PA28 +#define GPIO_FPGA_CCLK AT91C_PIO_PA29 +#define GPIO_FPGA_DIN AT91C_PIO_PA30 +#define GPIO_FPGA_DOUT AT91C_PIO_PA31 + +#endif // CONFIG_GPIO_PROXMARK3_H_ diff --git a/include/config_gpio_proxmark5.h b/include/config_gpio_proxmark5.h new file mode 100644 index 000000000..87ab61613 --- /dev/null +++ b/include/config_gpio_proxmark5.h @@ -0,0 +1,133 @@ +//----------------------------------------------------------------------------- +// Copyright (C) Proxmark3 contributors. See AUTHORS.md for details. +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// See LICENSE.txt for the text of the license. +//----------------------------------------------------------------------------- +// GPIO pin mapping for the Proxmark5 +//----------------------------------------------------------------------------- + +#ifndef CONFIG_GPIO_PROXMARK5_H_ +#define CONFIG_GPIO_PROXMARK5_H_ + +#include "at32f435_437_crm.h" +#include "at32f435_437_gpio.h" + +// leds +#define AT32_GPIO_LED_CLK CRM_GPIOC_PERIPH_CLOCK +#define AT32_GPIO_LED GPIOC +#define AT32_GPIO_LEDA_PIN GPIO_PINS_3 +#define AT32_GPIO_LEDB_PIN GPIO_PINS_15 +#define AT32_GPIO_LEDC_PIN GPIO_PINS_14 +#define AT32_GPIO_LEDD_PIN GPIO_PINS_13 +// button +#define AT32_GPIO_BTN_CLK CRM_GPIOB_PERIPH_CLOCK +#define AT32_GPIO_BTN GPIOB +#define AT32_GPIO_BTN_PIN GPIO_PINS_12 +// qspi flash +#define AT32_GPIO_PERIPH_QSPI_FLASH_CLK CRM_GPIOB_PERIPH_CLOCK,CRM_GPIOC_PERIPH_CLOCK,CRM_GPIOH_PERIPH_CLOCK +#define AT32_GPIO_QSPI_FLASH_IO0 GPIOB // <-- +#define AT32_GPIO_QSPI_FLASH_IO0_SOURCE GPIO_PINS_SOURCE11 +#define AT32_GPIO_QSPI_FLASH_IO0_MUX GPIO_MUX_10 +#define AT32_GPIO_QSPI_FLASH_IO0_PIN GPIO_PINS_11 // PB11_QSPI1_IO0 +#define AT32_GPIO_QSPI_FLASH_IO1 GPIOH // <-- +#define AT32_GPIO_QSPI_FLASH_IO1_SOURCE GPIO_PINS_SOURCE3 +#define AT32_GPIO_QSPI_FLASH_IO1_MUX GPIO_MUX_10 +#define AT32_GPIO_QSPI_FLASH_IO1_PIN GPIO_PINS_3 // PH3_QSPI1_IO1 +#define AT32_GPIO_QSPI_FLASH_IO2 GPIOC // <-- +#define AT32_GPIO_QSPI_FLASH_IO2_SOURCE GPIO_PINS_SOURCE4 +#define AT32_GPIO_QSPI_FLASH_IO2_MUX GPIO_MUX_10 +#define AT32_GPIO_QSPI_FLASH_IO2_PIN GPIO_PINS_4 // PC4_QSPI1_IO2 +#define AT32_GPIO_QSPI_FLASH_IO3 GPIOC // <-- +#define AT32_GPIO_QSPI_FLASH_IO3_SOURCE GPIO_PINS_SOURCE5 +#define AT32_GPIO_QSPI_FLASH_IO3_MUX GPIO_MUX_10 +#define AT32_GPIO_QSPI_FLASH_IO3_PIN GPIO_PINS_5 // PC5_QSPI1_IO3 +#define AT32_GPIO_QSPI_FLASH_SCK GPIOB // <-- +#define AT32_GPIO_QSPI_FLASH_SCK_SOURCE GPIO_PINS_SOURCE1 +#define AT32_GPIO_QSPI_FLASH_SCK_MUX GPIO_MUX_9 +#define AT32_GPIO_QSPI_FLASH_SCK_PIN GPIO_PINS_1 // PB1_QSPI1_SCK +#define AT32_GPIO_QSPI_FLASH_CS GPIOB // <-- +#define AT32_GPIO_QSPI_FLASH_CS_SOURCE GPIO_PINS_SOURCE10 +#define AT32_GPIO_QSPI_FLASH_CS_MUX GPIO_MUX_9 +#define AT32_GPIO_QSPI_FLASH_CS_PIN GPIO_PINS_10 // PB10_QSPI1_CS +// fpga 24m clock +#define AT32_GPIO_PERIPH_FPGA_24M_CLK CRM_GPIOA_PERIPH_CLOCK +#define AT32_GPIO_FPGA_24M_CLK GPIOA +#define AT32_GPIO_FPGA_24M_CLK_PIN GPIO_PINS_8 +// fpga switch +#define AT32_GPIO_FPGA_SWITCH_CLK CRM_GPIOB_PERIPH_CLOCK +#define AT32_GPIO_FPGA_SWITCH GPIOB +#define AT32_GPIO_FPGA_SWITCH_PIN GPIO_PINS_5 +// fpga ssc(spi ti_mode) +#define AT32_GPIO_PERIPH_SSC_CLK CRM_GPIOB_PERIPH_CLOCK +#define AT32_GPIO_SSC_DIN GPIOB // <-- +#define AT32_GPIO_SSC_DIN_SOURCE GPIO_PINS_SOURCE9 +#define AT32_GPIO_SSC_DIN_MUX GPIO_MUX_6 +#define AT32_GPIO_SSC_DIN_PIN GPIO_PINS_9 // PB9_SPI4_MOSI +#define AT32_GPIO_SSC_DOUT GPIOB // <-- +#define AT32_GPIO_SSC_DOUT_SOURCE GPIO_PINS_SOURCE8 +#define AT32_GPIO_SSC_DOUT_MUX GPIO_MUX_6 +#define AT32_GPIO_SSC_DOUT_PIN GPIO_PINS_8 // PB8_SPI4_MISO +#define AT32_GPIO_SSC_CLK GPIOB // <-- +#define AT32_GPIO_SSC_CLK_SOURCE GPIO_PINS_SOURCE7 +#define AT32_GPIO_SSC_CLK_MUX GPIO_MUX_6 +#define AT32_GPIO_SSC_CLK_PIN GPIO_PINS_7 // PB7_SPI4_SCK +#define AT32_GPIO_SSC_FRAME GPIOB // <-- +#define AT32_GPIO_SSC_FRAME_SOURCE GPIO_PINS_SOURCE6 +#define AT32_GPIO_SSC_FRAME_MUX GPIO_MUX_6 +#define AT32_GPIO_SSC_FRAME_PIN GPIO_PINS_6 // PB6_SPI4_CS +// fpga ssc clk counter +#define CRM_GPIO_PERIPH_COUNT_SSP_CLK CRM_GPIOB_PERIPH_CLOCK +#define CRM_GPIO_COUNT_SSP_CLK GPIOB +#define CRM_GPIO_COUNT_SSP_CLK_SOURCE GPIO_PINS_SOURCE3 +#define CRM_GPIO_COUNT_SSP_CLK_MUX GPIO_MUX_1 +#define CRM_GPIO_COUNT_SSP_CLK_PIN GPIO_PINS_3 +// fpga spi(for cmd) +#define AT32_GPIO_PERIPH_SPI_CLK CRM_GPIOC_PERIPH_CLOCK,CRM_GPIOA_PERIPH_CLOCK +#define AT32_GPIO_SPI_CS GPIOA // <-- +#define AT32_GPIO_SPI_CS_PIN GPIO_PINS_15 +#define AT32_GPIO_SPI_SCK GPIOC // <-- +#define AT32_GPIO_SPI_SCK_SOURCE GPIO_PINS_SOURCE10 +#define AT32_GPIO_SPI_SCK_MUX GPIO_MUX_6 +#define AT32_GPIO_SPI_SCK_PIN GPIO_PINS_10 +#define AT32_GPIO_SPI_MISO GPIOC // <-- +#define AT32_GPIO_SPI_MISO_SOURCE GPIO_PINS_SOURCE11 +#define AT32_GPIO_SPI_MISO_MUX GPIO_MUX_6 +#define AT32_GPIO_SPI_MISO_PIN GPIO_PINS_11 +#define AT32_GPIO_SPI_MOSI GPIOC // <-- +#define AT32_GPIO_SPI_MOSI_SOURCE GPIO_PINS_SOURCE12 +#define AT32_GPIO_SPI_MOSI_MUX GPIO_MUX_6 +#define AT32_GPIO_SPI_MOSI_PIN GPIO_PINS_12 +// adc rssi +#define AT32_GPIO_ADC_RSSI_CLK CRM_GPIOC_PERIPH_CLOCK +#define AT32_GPIO_ADC_RSSI GPIOC +#define AT32_GPIO_ADC_RSSI_LF_PIN GPIO_PINS_0 +#define AT32_GPIO_ADC_RSSI_HF_PIN GPIO_PINS_1 +// arm power lock +#define AT32_GPIO_ARM_POWER_LOCK_CLK CRM_GPIOB_PERIPH_CLOCK +#define AT32_GPIO_ARM_POWER_LOCK GPIOB +#define AT32_GPIO_ARM_POWER_LOCK_PIN GPIO_PINS_0 +// i2c software +#define AT32_GPIO_I2C_SW_CLK CRM_GPIOC_PERIPH_CLOCK +#define AT32_GPIO_I2C_SW GPIOC +#define AT32_GPIO_I2C_SCL_PIN GPIO_PINS_6 +#define AT32_GPIO_I2C_SDA_PIN GPIO_PINS_7 +// spi in inter-usb for switch master/slave +#define AT32_GPIO_INTER_USB_SPI_ROLE_CLK CRM_GPIOB_PERIPH_CLOCK +#define AT32_GPIO_INTER_USB_SPI_ROLE GPIOB +#define AT32_GPIO_INTER_USB_SPI_ROLE_PIN GPIO_PINS_2 +// vusb +#define AT32_GPIO_VUSB_CLK CRM_GPIOC_PERIPH_CLOCK +#define AT32_GPIO_VUSB GPIOC +#define AT32_GPIO_VUSB_PIN GPIO_PINS_2 + +#endif // CONFIG_GPIO_PROXMARK5_H_