From 7d5dd46d944c5d601036cd2befe2435c9e2cc588 Mon Sep 17 00:00:00 2001
From: dxl <64101226@qq.com>
Date: Sun, 11 Oct 2026 23:43:32 +0800
Subject: [PATCH] FPGA: Added a TODO in hi_reader.v

---
 fpga/hi_reader.v | 1 +
 1 file changed, 1 insertion(+)

diff --git a/fpga/hi_reader.v b/fpga/hi_reader.v
index fe37cf19f..8fabc2e35 100644
--- a/fpga/hi_reader.v
+++ b/fpga/hi_reader.v
@@ -56,6 +56,7 @@ wire low_signal_mode = (subcarrier_frequency == `FPGA_HF_READER_2SUBCARRIERS_424
 
 always @(negedge adc_clk)
 begin
+    // TODO DXL - 阈值是绝对值，这是否会在PM5上导致问题？需要考虑判定的adc值是否和场的信号同步，待测
     if (low_signal_mode)
     begin
         if (& adc_d[7:4]) after_hysteresis <= 1'b1;