Commit Graph
16 Commits
Author SHA1 Message Date
iceman1001andClaude Opus 5 (1M context) 43fe6c3eb8 fpga_compress: pick the LZ4 block size by consumer, not by file count
The 1 MB block branch exists for the ARM .data section: start.c's
uncompress_data_section() reads one 4-byte length and does one
LZ4_decompress_safe(), so .data has to arrive as a single block. It was
selected by 'num_infiles == 1', which is not what tells the two callers apart.

A build that skips LF, FeliCa and ISO15693 leaves FPGA_BITSTREAMS holding just
fpga_pm3_hf.bit, so the bitstream took that same branch and was packed as one
42 kB block. get_from_fpga_combined_stream() decompresses into a
FPGA_RING_BUFFER_BYTES buffer, 16 kB since 83c3f81b1:

  [#] inflate returned: -13247
  [#] reset_fpga_stream failed

Before 83c3f81b1 the copy was clamped with MIN(FPGA_RING_BUFFER_BYTES, ...)
whatever buffer_size said, so the blocks came out at 30 kB and the 30 kB ring
buffer still took them. That is why the commit looks like the cause - it only
removed the clamp that was covering for the wrong branch.

Add -s for the single block case and let the FPGA path always chop at
FPGA_RING_BUFFER_BYTES, however many bitstreams went in:

  4 bitstreams   169344 in -> 106933 out, byte identical to before
  1 bitstream     42172 in ->  28718 out, 3 blocks 13265/13206/2247,
                                          was 1 block of 27627
  .data  (-s)     14944 in ->   8786 out, byte identical to the
                                          obj/fullimage.data.bin.z in tree

Also hand the ring buffer back when reset_fpga_stream() fails. The early
return left it allocated for the rest of the session, which is the reporter's

  [#]   BigBuf_size............. 48116
  [#]   Available memory........ 31732

48116 - 31732 is 16384, exactly FPGA_RING_BUFFER_BYTES.

No CAPABILITIES_VERSION bump: fpga_all.bit.z is objcopy'd into the same
fullimage as the decompressor that reads it, so nothing here is client facing.

Reported and correctly diagnosed by @ewangsoft.

Fixes #3599

Co-Authored-By: Claude Opus 5 (1M context)
2026-09-13 08:14:43 +02:00
iceman1001 83c3f81b1b move to 16kb fpga ring buffer size, recompile fullimage and lower stack size to 7160 bytes 2026-09-01 10:14:35 +02:00
iceman1001 2d610b8dc0 text & style 2025-06-08 10:02:00 +02:00
douniwan5788 0710a37429 fix: bitstream_index_map overflow 2024-08-30 16:05:47 +08:00
iceman1001 7f40ad7f9d style 2024-08-29 12:29:23 +02:00
douniwan5788 413a17a7a6 feature: Make the FPGA bitstreams working with SKIP_* define.
Now, you can enable at least two of your favorite technologies (such as LF and HF 14443A) attached a standalone mode and still have spare ROM space for other functionalities on a Proxmark3 Easy with a 256KiB ROM.
2024-08-26 20:55:59 +08:00
douniwan5788 8928883f2d refactor: move FPGA_BITSTREAM_* to fpga.h 2024-08-26 20:55:58 +08:00
Alex f47e4ed115 Move hardcoded value where it belongs
Keep FPGA parameters together in the same place
2023-08-24 18:22:50 +02:00
iceman1001 d5205e5a34 fix #1640 the btaddon compilation leaves the bigbuff malloc around 38kb. By lessen the fpga ring buffer to be 30kb instead leaves some room for a smaller bigbuff 2022-03-28 19:30:55 +02:00
Philippe Teuwen 30aa7aa7d1 Adapting license headers, WIP 2022-01-08 00:40:52 +01:00
merlokk d46d23d079 make style 2021-08-25 14:44:06 +03:00
Philippe Teuwen e79fb92074 Add fpga-xc3s100e and icopyx support 2021-08-21 23:45:46 +02:00
slurdge 96ae026f35 import lz4 2020-06-03 16:07:23 +02:00
Philippe Teuwen cb8d589fc4 armsrc: clarify static vars vs global vars, part 3 2020-05-19 18:12:40 +02:00
iceman1001 6e3dde9d76 add 'hf plot' - from offical repo (piwi) 2020-01-12 16:45:24 +01:00
Philippe Teuwen 80b4e81130 Fix fpga_compress race condition and isolate it in tools 2019-08-11 21:42:01 +02:00