mirror of
https://github.com/torlando-tech/pyxis.git
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torlando-agent[bot]andClaude Opus 4.8
bd7b357b96
Confirmed fixes: - LVGL hybrid-allocator threshold 1024->256 (lib/lv_mem_hybrid.h): moves ~45KB of small LVGL objects to PSRAM, fixing internal-heap starvation that made the call/loopback pipeline intermittently fail to allocate and reboot mid-call (internal free 71->116KB, largest contiguous block 61->106KB). - ES7210 mic PGA gain 21dB->12dB (lxst_audio.cpp): 21dB saturated the ADC -- an rms-7003 noise floor in silence + 0x8000 negative-rail spikes + a spectral-peak shift that masqueraded as a "+17% pitch warp". At 12dB idle silence is clean (rms 48). Diagnostic harness (PYXIS_TEST_HOOKS, test-only): T:RAWMIC[stage], T:REG, and T:RECORD/T:DUMPREC add a raw-mic UDP tap plus a reliable PSRAM recorder with a checksummed serial transfer, and T:LOOPBACK wiring, for objective mic-capture analysis (offboard Whisper STT scoring). Exploratory / still unresolved: captured speech remains garbled (oscillating static, likely an ES7210 sigma-delta capture instability -- under investigation). Includes a 16kHz/main-PLL clock path + MICBIAS exploration; the "warp" was the gain artifact, not a clock issue, so the 16kHz path can later be simplified back to 8kHz. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01UWZuYkHBRqNb6BZHV8sTG5
112 lines
4.6 KiB
Plaintext
112 lines
4.6 KiB
Plaintext
# Required for Arduino framework
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CONFIG_FREERTOS_HZ=1000
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# Flash configuration for 8MB
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CONFIG_ESPTOOLPY_FLASHSIZE_8MB=y
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CONFIG_PARTITION_TABLE_CUSTOM=y
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
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# Enable Bluetooth with NimBLE (uses ~100KB less RAM than Bluedroid)
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CONFIG_BT_ENABLED=y
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CONFIG_BT_NIMBLE_ENABLED=y
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CONFIG_BT_BLUEDROID_ENABLED=n
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# NimBLE role configuration - enable both central and peripheral for mesh
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CONFIG_BT_NIMBLE_ROLE_CENTRAL=y
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CONFIG_BT_NIMBLE_ROLE_PERIPHERAL=y
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CONFIG_BT_NIMBLE_ROLE_BROADCASTER=y
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CONFIG_BT_NIMBLE_ROLE_OBSERVER=y
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# NimBLE connection settings
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CONFIG_BT_NIMBLE_MAX_CONNECTIONS=3
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CONFIG_BT_NIMBLE_MAX_BONDS=10
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# NimBLE GATT settings
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CONFIG_BT_NIMBLE_ATT_PREFERRED_MTU=517
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CONFIG_BT_NIMBLE_GAP_DEVICE_NAME_MAX_LEN=31
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# Increase task stack size for stability
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CONFIG_BT_NIMBLE_TASK_STACK_SIZE=8192
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# Coexistence with WiFi
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CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE=y
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# Enable C++ exceptions (required for microReticulum)
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CONFIG_COMPILER_CXX_EXCEPTIONS=y
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CONFIG_COMPILER_CXX_EXCEPTIONS_EMG_POOL_SIZE=0
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# Enable PSRAM (8MB external RAM) for zero heap fragmentation
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CONFIG_ESP32S3_SPIRAM_SUPPORT=y
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CONFIG_SPIRAM=y
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CONFIG_SPIRAM_MODE_OCT=y
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CONFIG_SPIRAM_SPEED_80M=y
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# Configure malloc to use PSRAM
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CONFIG_SPIRAM_USE_MALLOC=y
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# Allocations smaller than this go to internal RAM (bytes)
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# Lowered from 4096 to 64 to move Bytes allocations (16-200 bytes) to PSRAM
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# This reduces internal heap fragmentation at cost of slightly slower access
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CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL=64
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# Reserve this much internal RAM for DMA/ISR (bytes)
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# NOTE: framework=arduino uses PRECOMPILED ESP-IDF libs, so this file is NOT consumed
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# by the tdeck build — internal-RAM placement is controlled via build_flags + custom
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# allocators in platformio.ini (RNS_PSRAM_ALLOCATOR, NIMBLE_MEM_ALLOC_MODE_EXTERNAL)
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# and lib/lv_mem_hybrid.h, not here.
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CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL=32768
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# ============================================================================
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# Boot Time Optimizations
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# These settings reduce boot time. See BOOT_OPTIMIZATIONS.md for details.
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# ============================================================================
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# Disable PSRAM memory test at boot (~2 seconds saved for 8MB PSRAM)
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# The memory test verifies PSRAM integrity but is redundant for stable hardware.
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# To re-enable for debugging: comment out this line or set to y
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CONFIG_SPIRAM_MEMTEST=n
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# Reduce bootloader log verbosity (saves serial output time)
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# Bootloader messages are rarely needed in production
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CONFIG_BOOTLOADER_LOG_LEVEL_WARN=y
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CONFIG_BOOTLOADER_LOG_LEVEL=2
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# Skip ROM bootloader output (saves serial time)
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CONFIG_BOOT_ROM_LOG_ALWAYS_OFF=y
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# ============================================================================
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# FreeRTOS Timer Service Task
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# Default 2048 is too small when NimBLE/WiFi timer callbacks run
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# ============================================================================
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CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH=4096
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# ============================================================================
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# Task Watchdog Timer (TWDT)
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# Detects task starvation and deadlock conditions on user-code core (CPU1).
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# 30s timeout accommodates SPIFFS flash I/O during identity persistence
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# (writing 40-50 destinations to flash takes 5-15s with GC/erase).
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#
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# CPU0 IDLE watchdog INTENTIONALLY DISABLED:
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# ESP-IDF runs the WiFi controller, lwIP TCP/IP stack, and system timer
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# tasks on CPU0. Under heavy network load (busy TCP frames, mDNS, multicast
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# WiFi traffic) those tasks can starve the CPU0 idle task for >30s without
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# any user-code involvement. Triggering an `abort` because lwIP is busy is
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# false-positive — it doesn't mean any pyxis task is misbehaving. We keep
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# the watchdog on the loopTask (added explicitly via esp_task_wdt_add in
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# main.cpp:1421) and on CPU1 idle, which together cover the core where
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# all user code runs. Surfaced 2026-05-05 by the post-graft `task_wdt_isr`
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# abort decoded to esp_vApplicationIdleHook on core 0; pre-graft pyxis
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# was hitting the same pattern (~57s reset cadence).
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# ============================================================================
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CONFIG_ESP_TASK_WDT_EN=y
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CONFIG_ESP_TASK_WDT_TIMEOUT_S=30
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CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=n
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CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1=y
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# ============================================================================
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# Core Dump — writes CPU state + backtrace to flash on crash
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# Read with: espcoredump.py info_corefile -t raw -c 0x7F0000 -s 0x10000 <port>
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# ============================================================================
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CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH=y
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CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF=y
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CONFIG_ESP_COREDUMP_CHECKSUM_SHA256=y
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CONFIG_ESP_COREDUMP_MAX_TASKS_NUM=64
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