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Merge pull request #51 from etienn01/fix-heltec-v4-display-and-boot

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Fix Heltec V4 display (Vext PMOS polarity) and Xtensa TX-wait stack overflow.

Conflict in heltec_wifi_lora32_v4_procpu.dts resolved: kept the corrected
BatADC header line from 247ca65 (GPIO1 = ADC1_CH0 / &adc0, GPIO37 active-HIGH)
and took the PR Vext change (GPIO36 active-LOW PMOS rail switch).

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
This commit is contained in:
liquidraver
2026-07-07 22:18:09 +02:00
co-authored by Claude Opus 4.8
parent 247ca655a8 c4fb9c0638
commit 4246f94ae1
2 changed files with 10 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files
zephcore/adapters/radio/radio_common.h
+1 -1
View File
@@ -24,7 +24,7 @@
#define RX_RING_SIZE 8 /* ~2 KB; buffers burst arrivals at SF7/BW500 */
/* --- TX wait thread --- */
#define TX_WAIT_THREAD_STACK_SIZE 1024
#define TX_WAIT_THREAD_STACK_SIZE 2048
#define TX_WAIT_THREAD_PRIORITY 10 /* preemptible, below main thread */
#define TX_TIMEOUT_MS 5000 /* hard timeout for TX completion signal */
zephcore/boards/esp32/heltec_wifi_lora32_v4/heltec_wifi_lora32_v4_procpu.dts
+9 -6
View File
@@ -8,7 +8,7 @@
* OLED: SSD1306 128x64 on I2C0
* Button: GPIO0
* LED: GPIO35 (PWM via LEDC0)
* Vext: GPIO36 active-HIGH (powers OLED and sensors)
* Vext: GPIO36 active-LOW PMOS rail switch (powers OLED and sensors)
* BatADC: GPIO1 = ADC1_CH0 (&adc0), enable GPIO37 active-HIGH (vbat_enable in overlay)
*
* V4.2 (this file) — GC1109 PA, TX_EN on GPIO46.
@@ -20,7 +20,7 @@
* GPIO7 = VFEM_Ctrl LDO power (active-HIGH, always-on)
* GPIO2 = GC1109 CSD (chip enable, active-HIGH)
* GPIO46 = GC1109 CPS (TX mode select, active-HIGH)
* - Vext control is active-HIGH (was active-LOW on V3)
* - Vext rail switch is active-LOW (PMOS; GPIO36 low = rail on)
* - DIO2 used as RF switch alongside external FEM TX control
*
* LoRa SPI2: SCLK=9, MOSI=10, MISO=11, NSS=8
@@ -83,13 +83,16 @@
* zephyr,user { io-channels } (see board.overlay), and a voltage-divider
* on &adc1 ch0 would target GPIO11 = the SX1262 MISO. See &adc0 below. */
/* Vext — powers OLED and external peripherals (active-HIGH on GPIO36).
* regulator-fixed + SSD1306 vin-supply: powers rail at boot without relying on
* power-domains (CONFIG_PM_DEVICE is disabled in prj.conf). */
/* Vext rail switch — PMOS, ACTIVE LOW (GPIO36 low = rail ON).
* Powers the OLED (incl. its I2C pull-ups) and the expansion header.
* Verified on hardware: GPIO36 driven high leaves the rail floating
* (~1.6 V) and the OLED unpowered; driven low gives a clean 3.3 V.
* regulator-boot-on + always-on: the rail comes up at regulator init,
* well before the SSD1306 driver init. */
vext_enable: vext-enable {
compatible = "regulator-fixed";
regulator-name = "vext";
enable-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; /* GPIO36 = gpio1 pin 4 */
enable-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* GPIO36 = gpio1 pin 4 */
regulator-boot-on;
regulator-always-on;
};