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https://github.com/liquidraver/ZephCore.git
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PM debug v1
This commit is contained in:
liquidraver
@@ -49,6 +49,14 @@
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# excellent on a current meter. Check that log line before trusting any
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# measurement.
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#
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# PAD HOLD — light sleep powers down RTC_PERIPH, so every RTC-capable pad
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# (GPIO 0-21, which is all of them on these boards) loses its level unless
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# held. The paired overlay holds the SX1262 NSS and RESET; without that, a
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# floating NSS lets the sleeping radio clock garbage into its own retention
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# RAM and the node transmits ~30 dB down until the next reboot. The overlay
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# hardcodes NSS GPIO8 / RESET GPIO12 / &spi2 — verify a new board matches
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# before adding it to the allowlist below.
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#
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# Also required and supplied by the paired pm_esp32.overlay:
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# - &rtc_timer enabled. soc/espressif/common/power.c refuses to sleep without
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# it, logging "Sleep skipped. Make sure '&rtc_timer' is enabled as a wakeup
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@@ -5,6 +5,9 @@
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* enough; this file does not need to be listed separately.
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*/
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#include <zephyr/dt-bindings/gpio/gpio.h>
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#include <zephyr/dt-bindings/gpio/espressif-esp32-gpio.h>
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/*
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* The RTC timer is the wake source for every timed sleep. Upstream leaves it
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* status = "disabled" (zephyr/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi),
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@@ -34,3 +37,57 @@
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&gpio0 {
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wakeup-source;
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};
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/*
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* Hold the SX1262 chip-select across light sleep.
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*
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* Light sleep powers down RTC_PERIPH on this SoC, and every LoRa pin on the
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* allowlisted boards is an RTC-capable pad (GPIO 0-21), so their levels are
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* NOT retained unless explicitly held. The chain:
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*
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* 1. patches/zephyr/0012 passes GPIO_INT_WAKEUP on DIO1. On the S3 that
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* lands on esp_sleep_enable_ext1_wakeup_io() (drivers/gpio/gpio_esp32.c,
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* SOC_PM_SUPPORT_EXT1_WAKEUP), i.e. RTC_EXT1_TRIG_EN.
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* 2. esp_sleep_start() only forces ESP_PD_DOMAIN_RTC_PERIPH on for
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* RTC_EXT0_TRIG_EN | RTC_GPIO_TRIG_EN. EXT1 is not in that mask, so the
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* domain is left AUTO and powered OFF for the whole sleep.
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* 3. ext1_wakeup_prepare() then calls rtcio_hal_hold_enable() for the EXT1
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* pin *only*, and only because RTC_PERIPH is off — IDF's own code
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* treating "RTC_PERIPH down" as "this pad cannot hold its own state".
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* DIO1 survives; nothing else does.
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* 4. Zephyr's general mechanism, esp32_sleep_gpio_prepare(), holds only pins
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* carrying ESP32_GPIO_SLEEP_HOLD_EN. Hence this override.
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*
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* NSS is the pin that matters. Undriven, it floats, and the SX1262 samples
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* SPI commands whenever NSS is low — so a sleeping chip sitting in warm-start
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* sleep with its entire configuration (PA config, OCP, SetTxParams) in
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* retention RAM is exposed to whatever the floating bus does. Nothing in the
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* driver ever re-issues SetTxParams: lora_config() is its only writer and
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* LoRaRadioBase::configure() short-circuits on every transmit after the first,
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* so a corrupted TX power persists until reboot or a `set tx <new value>`.
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* Symptom is a node that still relays but transmits ~30 dB down.
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*
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* Holding NSS high for the duration deselects the chip, which also makes SCK
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* and MOSI harmless — nothing can be clocked in while CS is deasserted, so
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* those pins do not need the pinctrl-side `sleep-hold-en`.
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*
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* All five allowlisted boards (heltec_wifi_lora32_v3/v4/v43,
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* heltec_wireless_tracker/_v2) wire the radio identically — &spi2, NSS GPIO8,
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* RESET GPIO12 — which is what lets this live in one shared overlay. Re-check
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* that before adding a board to the allowlist in CMakeLists.txt.
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*/
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&spi2 {
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cs-gpios = <&gpio0 8 (GPIO_ACTIVE_LOW | ESP32_GPIO_SLEEP_HOLD_EN)>;
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};
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/*
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* RESET is open-drain active-low against the SX1262's internal pull-up, so an
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* unheld pad going high-Z already reads as "not reset" and this is belt and
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* braces rather than a known fault. It costs nothing and removes the question
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* of what the pad does on the way into and out of power-down — a spurious low
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* here would reset the radio outright.
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*/
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&lora0 {
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reset-gpios = <&gpio0 12 (GPIO_OPEN_DRAIN | GPIO_ACTIVE_LOW |
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ESP32_GPIO_SLEEP_HOLD_EN)>;
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};
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@@ -71,7 +71,7 @@ diff --git a/drivers/lora/native/sx126x/sx126x.c b/drivers/lora/native/sx126x/sx
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index 30243ba5dc7..f0794661515 100644
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--- a/drivers/lora/native/sx126x/sx126x.c
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+++ b/drivers/lora/native/sx126x/sx126x.c
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@@ -6,14 +6,21 @@
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@@ -6,14 +6,52 @@
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#include <zephyr/kernel.h>
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#include <zephyr/device.h>
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#include <zephyr/drivers/lora.h>
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@@ -89,6 +89,37 @@ index 30243ba5dc7..f0794661515 100644
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+ * system work queue so USB/BLE/timer work items cannot delay packet RX. */
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+#define SX126X_DIO1_WQ_STACK_SIZE 2560
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+K_THREAD_STACK_DEFINE(sx126x_dio1_wq_stack, SX126X_DIO1_WQ_STACK_SIZE);
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+
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+/* PA ramp time handed to SetTxParams at every site that programs TX power.
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+ *
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+ * Deliberately 800 us where RadioLib, loramac-node and Arduino MeshCore all
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+ * use 200 us -- do not "fix" this back to match them without reading the
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+ * following, and do not change one call site alone: two writers disagreeing
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+ * on the ramp would make TX spectral behaviour depend on which ran last.
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+ *
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+ * What it buys: a slower PA envelope puts less spectral energy at the burst
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+ * edges, which is mask margin (ETSI EN 300 220 / FCC) at TX start and stop.
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+ * That is worth most on the boards carrying an external PA or FEM, where
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+ * splatter gets amplified along with the wanted signal.
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+ *
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+ * What it does NOT buy, despite being an easy assumption: any link-budget or
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+ * noise-immunity benefit. Ramp time shapes our own transmitter's skirts. It
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+ * does not raise TX power, change what a distant receiver hears in-band, or
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+ * help its demodulator. The only way it helps anyone's reception is by not
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+ * desensitising a CO-SITED or adjacent-channel radio -- real on a hilltop
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+ * with several co-located nodes, negligible between nodes kilometres apart.
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+ *
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+ * What it costs: 600 us more TX startup than the 200 us default, and nothing
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+ * else. The ramp completes before modulation begins -- the chip holds BUSY
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+ * after SetTx until ramp-up is done, which is why RadioLib waits on exactly
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+ * that edge -- so it consumes no preamble symbols at any SF/BW and does not
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+ * eat into the RX duty-cycle preamble budget. Airtime is unchanged; both
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+ * reference stacks likewise exclude ramp from their time-on-air maths. The
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+ * one behavioural side effect is that the gap between "LBT reports the
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+ * channel clear" and "we are actually radiating" grows by those 600 us,
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+ * which is negligible against a contention window measured in milliseconds.
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+ */
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+#define SX126X_TX_RAMP_TIME SX126X_RAMP_800_US
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+
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#define SX126X_REST_STATE \
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(IS_ENABLED(CONFIG_LORA_SX126X_NATIVE_SLEEP) \
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@@ -728,7 +759,7 @@ index 30243ba5dc7..f0794661515 100644
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ret = sx126x_hal_configure_tx_params(dev, config->tx_power,
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config->frequency,
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- SX126X_RAMP_200_US);
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+ SX126X_RAMP_800_US);
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+ SX126X_TX_RAMP_TIME);
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if (ret < 0) {
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goto out;
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}
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@@ -862,10 +893,41 @@ index 30243ba5dc7..f0794661515 100644
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data->tx_async_signal = async;
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k_msgq_purge(&data->tx_msgq);
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@@ -777,6 +1349,31 @@ static int sx126x_lora_send_async(const struct device *dev,
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@@ -777,6 +1349,62 @@ static int sx126x_lora_send_async(const struct device *dev,
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/* Enable antenna and set TX path */
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sx126x_set_rf_path(dev, true, true);
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+ /* Re-assert PA config, OCP and TX power immediately before SetTx.
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+ *
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+ * sx126x_config() is otherwise the only writer of these three, and the
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+ * C++ adapter's config cache (LoRaRadioBase::configure) short-circuits
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+ * on every transmit after the first -- so between two lora_config()
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+ * calls nothing re-verifies what the chip is actually holding. The
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+ * chip keeps them in warm-start retention RAM across its sleep cycles,
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+ * which makes them precisely the state a disturbed SPI bus or a stray
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+ * command corrupts silently: the node goes on relaying, because
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+ * restart_rx re-issues SetRx constantly, while transmitting tens of dB
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+ * down until someone reboots it. That is not hypothetical -- ESP32
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+ * light sleep leaving NSS undriven produced exactly it; the cause is
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+ * fixed at source in boards/common/pm_esp32.overlay and this is the
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+ * belt-and-braces half that stops the class of fault rather than the
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+ * one instance.
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+ *
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+ * Costs no receive time. It runs after LBT has passed, with the chip
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+ * already committed to TX, and is ~15 bytes of SPI -- unlike forcing a
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+ * full lora_config(), which would have to tear RX down first (its
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+ * entry CAS rejects SX126X_STATE_RX) and re-run image calibration.
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+ *
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+ * Keep the ramp time identical to the sx126x_config() call site: two
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+ * writers disagreeing on it would make TX spectral behaviour depend on
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+ * which one ran last. */
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+ ret = sx126x_hal_configure_tx_params(dev, data->config.tx_power,
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+ data->config.frequency,
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+ SX126X_TX_RAMP_TIME);
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+ if (ret < 0) {
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+ goto out_error;
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+ }
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+
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+#ifdef CONFIG_LORA_SX126X_NATIVE_STANDALONE /* STM32WL HAL clamps in its own configure_tx_params; its config has no is_sx1261 */
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+ /* Sec 15.2 TX Clamp workaround (datasheet errata) -- SX1262 only.
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+ * Set bits [4:1] of register 0x08D8 before SetTx to prevent
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@@ -986,7 +1048,7 @@ index 30243ba5dc7..f0794661515 100644
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/* Set PA config and TX power */
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ret = sx126x_hal_configure_tx_params(dev, tx_power, frequency,
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- SX126X_RAMP_200_US);
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+ SX126X_RAMP_800_US);
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+ SX126X_TX_RAMP_TIME);
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if (ret < 0) {
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sx126x_set_sleep(dev);
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k_mutex_unlock(&data->lock);
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