Added the WTv2

README.md

@@ -47,7 +47,8 @@ Other benefits:
 | **Heltec V3** | ESP32-S3 | SX1262 | OLED (SSD1306), 8MB flash |
 | **Heltec V4.2** | ESP32-S3 | SX1262 + GC1109 PA | OLED (SSD1306), 16MB flash, 2MB PSRAM |
 | **Heltec V4.3** | ESP32-S3 | SX1262 + KCT8103L PA | OLED (SSD1306), 16MB flash, 2MB PSRAM |
-| **Heltec Wireless Tracker** | ESP32-S3 | SX1262 | ST7735R 160×80 TFT, UC6580 GPS |
+| **Heltec Wireless Tracker V1.1** | ESP32-S3 | SX1262 | ST7735R 160×80 TFT, UC6580 GPS |
+| **Heltec Wireless Tracker V2** | ESP32-S3FN8 | SX1262 + KCT8103L PA/FEM | ST7735R 160x80 TFT, UC6580 GNSS, battery ADC |
 | **LilyGo T-Beam v1.2** | ESP32 (PICO-D4) | SX1262 | AXP2101 PMU, GNSS, USB-UART CLI |
 
 ### Other

build.sh

@@ -42,6 +42,7 @@ ESP32_boards=(
     heltec_wifi_lora32_v4/esp32s3/procpu
     heltec_wifi_lora32_v43/esp32s3/procpu
     heltec_wireless_tracker/esp32s3/procpu
+    heltec_wireless_tracker_v2/esp32s3/procpu
     ttgo_tbeam/esp32/procpu
 )
 

zephcore/boards/esp32/heltec_wireless_tracker_v2/Kconfig

@@ -0,0 +1,3 @@
+config HEAP_MEM_POOL_ADD_SIZE_BOARD
+	int
+	default 4096

zephcore/boards/esp32/heltec_wireless_tracker_v2/Kconfig.heltec_wireless_tracker_v2

@@ -0,0 +1,3 @@
+config BOARD_HELTEC_WIRELESS_TRACKER_V2
+	select SOC_ESP32S3_FN8
+	select SOC_ESP32S3_PROCPU if BOARD_HELTEC_WIRELESS_TRACKER_V2_ESP32S3_PROCPU

zephcore/boards/esp32/heltec_wireless_tracker_v2/README.md

@@ -0,0 +1,79 @@
+# Heltec Wireless Tracker V2
+
+ZephCore board string:
+
+```bash
+west build -b heltec_wireless_tracker_v2/esp32s3/procpu zephcore --pristine --sysbuild
+```
+
+Build-verified ZephCore roles:
+
+- Companion: default build
+- Repeater: `-DEXTRA_CONF_FILE=boards/common/repeater.conf`
+- Room server: `-DEXTRA_CONF_FILE=boards/common/room_server.conf`
+- Observer: `-DEXTRA_CONF_FILE=boards/common/observer.conf`
+- Repeater uplink: `-DEXTRA_CONF_FILE="boards/common/repeater.conf;boards/common/repeater_uplink.conf"`
+
+Flash with the ESP32 runner after a sysbuild:
+
+```bash
+west flash --build-dir build --esp-device /dev/ttyACM0
+```
+
+On macOS, replace the device with the board's `/dev/cu.usbmodem*` path. If the
+ROM bootloader does not auto-enter download mode, connect USB-C, hold `USER`,
+tap `RST`, then release `USER`.
+
+The equivalent manual sysbuild flash layout is:
+
+```bash
+esptool.py --chip esp32s3 --port /dev/ttyACM0 write_flash \
+  0x00000 build/mcuboot/zephyr/zephyr.bin \
+  0x20000 build/zephcore/zephyr/zephyr.signed.bin
+```
+
+## Hardware
+
+| Function | ESP32-S3 GPIO | ZephCore node/property | Source |
+| --- | --- | --- | --- |
+| LoRa NSS | GPIO8 | `&spi2 cs-gpios` | Heltec schematic, MeshCore |
+| LoRa SCK/MOSI/MISO | GPIO9/GPIO10/GPIO11 | `&spi2` pinctrl | Heltec schematic, MeshCore |
+| LoRa RST/BUSY/DIO1 | GPIO12/GPIO13/GPIO14 | `reset-gpios`, `busy-gpios`, `dio1-gpios` | Heltec schematic, MeshCore |
+| SX1262 DIO2 RF switch | SX1262 DIO2 | `dio2-tx-enable` | MeshCore |
+| SX1262 DIO3 TCXO | SX1262 DIO3 | `dio3-tcxo-voltage = 1.8V` | MeshCore |
+| VFEM_Ctrl | GPIO7 | `fem_power` regulator | Heltec schematic, MeshCore |
+| PA_CSD | GPIO4 | `antenna-enable-gpios` | Heltec schematic, MeshCore |
+| PA_CTX | GPIO5 | `tx-enable-gpios` | Heltec schematic, MeshCore |
+| PA_CPS | GPIO46 | Unused/unclaimed | Heltec schematic/pin map |
+| UC6580 GNSS UART | RX GPIO33, TX GPIO34 | `&uart2`, `gnss-nmea-generic` | Heltec schematic, MeshCore |
+| GNSS_RST | GPIO35 | `gps-enable` alias, active-high run | Heltec schematic, MeshCore |
+| GNSS PPS | GPIO36 | Unused input | Heltec schematic |
+| TFT CS/SCLK/MOSI | GPIO38/GPIO41/GPIO42 | `&spi3` pinctrl | Heltec schematic, MeshCore |
+| TFT DC/RST | GPIO40/GPIO39 | MIPI-DBI `dc-gpios`, `reset-gpios` | Heltec schematic, MeshCore |
+| TFT backlight | GPIO21 | `disp_pwr_enable` regulator | Heltec schematic, MeshCore |
+| Vext rail | GPIO3 | `vext_enable`/`tft_pwr_enable` regulator | Heltec schematic, MeshCore |
+| Battery ADC | GPIO1 | `zephyr,user io-channels = <&adc0 0>` | Heltec schematic, MeshCore |
+| Battery ADC enable | GPIO2 | `vbat_enable` regulator | Heltec schematic, MeshCore |
+| Status/TX LED | GPIO18 | `led0`, `lora-tx-led` | Heltec schematic, MeshCore |
+| User button | GPIO0 | `sw0` | Heltec schematic, MeshCore |
+| I2C header | SDA GPIO6, SCL GPIO17 | `&i2c0`, sensors auto-detect | MeshCore |
+
+## Notes
+
+- This is a separate first-class board from Zephyr's upstream
+  `heltec_wireless_tracker` target, which models the V1.1 board.
+- Build validation covers the ESP32-S3FN8 CPU/flash layout, native USB
+  serial/JTAG console selection, SX1262 SPI/control devicetree, UC6580 UART
+  wiring, status LED, user button, battery ADC node, ST7735R display node, and
+  the ZephCore role link paths listed above.
+- Hardware has not been exercised in this workspace. Treat LoRa RF switching,
+  GNSS runtime behavior, battery calibration, TFT orientation/backlight, USB
+  flashing auto-reset, and LED/button polarity as untested until checked on a
+  physical Wireless Tracker V2.
+- Battery ADC is on ESP32-S3 ADC unit 1 (`&adc0`) channel 0, GPIO1. ADC unit 2
+  channel 0 is GPIO11 and must stay disabled because GPIO11 is LoRa MISO.
+- MeshCore's V2 target drives `PA_CSD` and `PA_CTX` but does not drive
+  `PA_CPS`/GPIO46. ZephCore leaves GPIO46 unclaimed pending hardware validation
+  of that KCT8103L control path.
+- `GNSS_RST` is exposed through ZephCore's `gps-enable` alias as an active-high
+  logical "run" line: high releases reset, low holds UC6580 off.

zephcore/boards/esp32/heltec_wireless_tracker_v2/board.cmake

@@ -0,0 +1,7 @@
+if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*")
+  set(OPENOCD OPENOCD-NOTFOUND)
+endif()
+find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH)
+
+include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)

zephcore/boards/esp32/heltec_wireless_tracker_v2/board.conf

@@ -0,0 +1,25 @@
+# Heltec Wireless Tracker V2 — ESP32-S3FN8, SX1262, UC6580 GNSS
+#
+# Hardware:
+#   SX1262 + KCT8103L PA/FEM
+#   ST7735R 160x80 TFT on SPI3
+#   UC6580 GNSS on UART2
+#   User button on GPIO0, status/TX LED on GPIO18
+#
+# Pin sources: Heltec Wireless Tracker V2.3 schematic/datasheet and MeshCore
+# variants/heltec_tracker_v2.
+
+CONFIG_ZEPHCORE_BOARD_NAME="Heltec Tracker V2"
+CONFIG_BT_DIS_MODEL_NUMBER_STR="Heltec Wireless Tracker V2"
+
+# ESP32-S3FN8 has 8 MB flash. Override esp32_common.conf's 4 MB default.
+CONFIG_ESPTOOLPY_FLASHSIZE_8MB=y
+
+# MeshCore enables the Heltec SX126x register patch for this variant.
+CONFIG_ZEPHCORE_SX126X_HELTEC_REG_PATCH=y
+
+# SX1262 input drive into the KCT8103L PA.
+# MeshCore's V2 default is 9 dBm, yielding roughly 22 dBm at the antenna with
+# the PA enabled. The module is physically capable of higher output; start
+# conservative to avoid overdriving the front end.
+CONFIG_ZEPHCORE_DEFAULT_TX_POWER_DBM=9

zephcore/boards/esp32/heltec_wireless_tracker_v2/board.overlay

@@ -0,0 +1,98 @@
+/*
+ * SPDX-License-Identifier: MIT
+ * Heltec Wireless Tracker V2 — ZephCore overlay
+ *
+ * The full DTS defines: SX1262 (lora0), ST7735R 160x80 TFT, UC6580 GNSS,
+ * button, status LED, battery ADC, Vext, FEM power, I2C0, SPI2/3, BLE, WiFi.
+ * This overlay adds ZephCore-specific integration on top.
+ */
+
+#include <zephyr/dt-bindings/input/input-event-codes.h>
+
+/ {
+	chosen {
+		/* Native USB serial/JTAG for ZephCore console and CLI. */
+		zephyr,console = &usb_serial;
+		zephyr,shell-uart = &usb_serial;
+
+		/* Mono-TFT wrapper: presents PIXEL_FORMAT_MONO01 to CFB and converts
+		 * each row to RGB565 for the ST7735R colour TFT. */
+		zephyr,display = &mono_tft;
+	};
+
+	mono_tft: mono-tft {
+		compatible = "zephcore,mono-tft";
+		tft-dev = <&st7735r_160x80>;
+		width = <160>;
+		height = <80>;
+	};
+
+	/* Button chain: short tap scrolls pages, double tap goes back, long press enters. */
+	user_btn_longpress {
+		compatible = "zephyr,input-longpress";
+		input = <&buttons>;
+		input-codes = <INPUT_KEY_0>;
+		short-codes = <INPUT_KEY_A>;
+		long-codes = <INPUT_KEY_ENTER>;
+		long-delay-ms = <1000>;
+	};
+
+	page_btn_multitap {
+		compatible = "zephcore,input-multi-tap";
+		input-codes = <INPUT_KEY_A>;
+		tap-codes = <INPUT_KEY_1 INPUT_KEY_LEFT>;
+		tap-delay-ms = <400>;
+	};
+};
+
+/* I2C sensors — auto-detected at runtime. Header pins per MeshCore:
+ * SDA=GPIO6, SCL=GPIO17. */
+&i2c0 {
+	#include "../../common/sensors-i2c.dtsi"
+};
+
+/*
+ * Flash partitions — ZephCore 8 MB layout matching the ESP32-S3-FN8 tracker
+ * class. Delete unused lpcore slots, storage, scratch, and coredump partitions.
+ * Place LittleFS at 0x7A0000 - 0x800000 (384 KB).
+ */
+/delete-node/ &slot0_lpcore_partition;
+/delete-node/ &slot1_lpcore_partition;
+/delete-node/ &storage_partition;
+/delete-node/ &scratch_partition;
+/delete-node/ &coredump_partition;
+/delete-node/ &slot0_partition;
+/delete-node/ &slot1_partition;
+
+/ {
+	chosen {
+		zephyr,settings-partition = &storage_partition;
+	};
+};
+
+&flash0 {
+	partitions {
+		slot0_partition: partition@20000 {
+			label = "image-0";
+			reg = <0x20000 0x3BE000>;
+		};
+		slot1_partition: partition@3de000 {
+			label = "image-1";
+			reg = <0x3DE000 0x3BE000>;
+		};
+		storage_partition: partition@79c000 {
+			label = "storage";
+			reg = <0x79C000 0x4000>;
+		};
+		lfs_partition: partition@7a0000 {
+			label = "lfs";
+			reg = <0x7A0000 0x60000>;
+		};
+	};
+};
+
+/* LittleFS auto-mount — standard /lfs mount point */
+#include "../../common/filesystem.dtsi"
+
+/* USB CDC-ACM companion transport when built with boards/common/esp32s3_usb.conf. */
+#include "../../common/esp32s3_usb_otg.dtsi"

zephcore/boards/esp32/heltec_wireless_tracker_v2/board.yml

@@ -0,0 +1,6 @@
+board:
+  name: heltec_wireless_tracker_v2
+  full_name: Heltec Wireless Tracker V2
+  vendor: heltec
+  socs:
+    - name: esp32s3

zephcore/boards/esp32/heltec_wireless_tracker_v2/heltec_wireless_tracker_v2-pinctrl.dtsi

@@ -0,0 +1,75 @@
+/*
+ * SPDX-License-Identifier: MIT
+ * Heltec Wireless Tracker V2 — pin control definitions
+ *
+ * Confirmed by Heltec V2.3 schematic/datasheet and MeshCore
+ * variants/heltec_tracker_v2.
+ *
+ * UART0: TX=GPIO43, RX=GPIO44
+ * UART2/GNSS: MCU TX=GPIO34, MCU RX=GPIO33
+ * I2C0 header: SDA=GPIO6, SCL=GPIO17
+ * SPI2 LoRa: SCLK=GPIO9, MOSI=GPIO10, MISO=GPIO11, NSS=GPIO8 via GPIO CS
+ * SPI3 TFT: SCLK=GPIO41, MOSI=GPIO42, CS=GPIO38
+ */
+
+#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
+#include <zephyr/dt-bindings/pinctrl/esp32s3-pinctrl.h>
+#include <zephyr/dt-bindings/pinctrl/esp32s3-gpio-sigmap.h>
+
+&pinctrl {
+	uart0_default: uart0_default {
+		group1 {
+			pinmux = <UART0_TX_GPIO43>;
+			output-high;
+		};
+
+		group2 {
+			pinmux = <UART0_RX_GPIO44>;
+			bias-pull-up;
+		};
+	};
+
+	uart2_default: uart2_default {
+		group1 {
+			pinmux = <UART2_TX_GPIO34>;
+			output-high;
+		};
+
+		group2 {
+			pinmux = <UART2_RX_GPIO33>;
+			bias-pull-up;
+		};
+	};
+
+	i2c0_default: i2c0_default {
+		group1 {
+			pinmux = <I2C0_SDA_GPIO6>,
+				 <I2C0_SCL_GPIO17>;
+			drive-open-drain;
+		};
+	};
+
+	spim2_default: spim2_default {
+		group1 {
+			pinmux = <SPIM2_MISO_GPIO11>,
+				 <SPIM2_SCLK_GPIO9>;
+		};
+
+		group2 {
+			pinmux = <SPIM2_MOSI_GPIO10>;
+			output-low;
+		};
+	};
+
+	spim3_default: spim3_default {
+		group1 {
+			pinmux = <SPIM3_SCLK_GPIO41>,
+				 <SPIM3_CSEL_GPIO38>;
+		};
+
+		group2 {
+			pinmux = <SPIM3_MOSI_GPIO42>;
+			output-low;
+		};
+	};
+};

zephcore/boards/esp32/heltec_wireless_tracker_v2/heltec_wireless_tracker_v2_procpu.dts

@@ -0,0 +1,284 @@
+/*
+ * SPDX-License-Identifier: MIT
+ * Heltec Wireless Tracker V2 — ZephCore procpu DTS
+ *
+ * Hardware:
+ *   MCU:    ESP32-S3FN8, 8 MB flash
+ *   Radio:  SX1262 on SPI2, KCT8103L external PA/FEM
+ *   GNSS:   UC6580 on UART2
+ *   TFT:    ST7735R-compatible 0.96" 160x80 on SPI3
+ *   Button: GPIO0
+ *   LED:    GPIO18
+ *
+ * Pin mappings are verified against:
+ *   - Heltec Wireless Tracker V2.3 schematic and V2 datasheet
+ *   - MeshCore variants/heltec_tracker_v2
+ *
+ * PA_CPS appears on GPIO46 in the Heltec pin map/schematic but MeshCore's V2
+ * variant does not drive it. ZephCore leaves GPIO46 unclaimed until the exact
+ * KCT8103L CPS behavior for this revision is confirmed.
+ */
+
+/dts-v1/;
+
+#include <espressif/esp32s3/esp32s3_fn8.dtsi>
+#include <espressif/partitions_0x0_amp_8M.dtsi>
+#include <zephyr/dt-bindings/adc/adc.h>
+#include <zephyr/dt-bindings/input/input-event-codes.h>
+#include <zephyr/dt-bindings/lora/sx126x.h>
+#include "heltec_wireless_tracker_v2-pinctrl.dtsi"
+
+/ {
+	model = "Heltec Wireless Tracker V2 PROCPU";
+	compatible = "heltec,wireless-tracker-v2", "espressif,esp32s3";
+
+	aliases {
+		led0 = &status_led;
+		lora-tx-led = &status_led;
+		uart-0 = &uart0;
+		uart-2 = &uart2;
+		i2c-0 = &i2c0;
+		lora0 = &lora0;
+		sw0 = &button0;
+		watchdog0 = &wdt0;
+		gnss = &gnss;
+		gps-enable = &gps_enable_pin;
+		display0 = &st7735r_160x80;
+	};
+
+	chosen {
+		zephyr,sram = &sram1;
+		zephyr,console = &usb_serial;
+		zephyr,shell-uart = &usb_serial;
+		zephyr,flash = &flash0;
+		zephyr,code-partition = &slot0_partition;
+		zephyr,bt-hci = &esp32_bt_hci;
+		zephyr,display = &st7735r_160x80;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		status_led: led_0 {
+			gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
+			label = "Status LED";
+		};
+	};
+
+	buttons: buttons {
+		compatible = "gpio-keys";
+
+		button0: button_0 {
+			gpios = <&gpio0 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+			label = "USER SW";
+			zephyr,code = <INPUT_KEY_0>;
+		};
+	};
+
+	/* Vext powers the TFT and UC6580 GNSS rail. Keep it on; ZephCore gates
+	 * GNSS by holding/releasing the GNSS reset line and gates only the TFT
+	 * backlight at runtime. */
+	vext_enable: tft_pwr_enable: vext-enable {
+		compatible = "regulator-fixed";
+		regulator-name = "vext";
+		enable-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
+		regulator-boot-on;
+		regulator-always-on;
+		startup-delay-us = <10000>;
+	};
+
+	/* GPIO21 drives the TFT backlight switch. */
+	disp_pwr_enable: disp-pwr-enable {
+		compatible = "regulator-fixed";
+		regulator-name = "disp-pwr-enable";
+		enable-gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;
+	};
+
+	/* GPIO35 is the UC6580 reset/run line. HIGH releases reset/runs GNSS. */
+	gps_en: gps-enable {
+		compatible = "gpio-leds";
+
+		gps_enable_pin: gps_enable {
+			gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+			label = "GPS Enable";
+		};
+	};
+
+	/* FEM LDO power supply: VFEM_Ctrl = GPIO7. */
+	fem_power: fem-power {
+		compatible = "regulator-fixed";
+		regulator-name = "fem-power";
+		enable-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
+		regulator-boot-on;
+		regulator-always-on;
+		startup-delay-us = <1000>;
+	};
+
+	/* ADC_Ctrl = GPIO2. ZephCore enables it only while sampling battery. */
+	vbat_enable: vbat-enable {
+		compatible = "regulator-fixed";
+		regulator-name = "vbat-enable";
+		enable-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
+	};
+
+	zephyr,user {
+		io-channels = <&adc0 0>;
+		/* MeshCore V2 uses a 5.42x empirical battery scale. With ESP32-S3
+		 * ADC_REF_INTERNAL (1100 mV), raw-to-battery multiplier is 5962 mV. */
+		vbat-mv-multiplier = <5962>;
+	};
+
+	mipi_dbi_st7735r_160x80 {
+		compatible = "zephyr,mipi-dbi-spi";
+		spi-dev = <&spi3>;
+		dc-gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;    /* GPIO40 */
+		reset-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;  /* GPIO39 */
+		write-only;
+		status = "okay";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		st7735r_160x80: st7735r@0 {
+			compatible = "sitronix,st7735r";
+			mipi-max-frequency = <24000000>;
+			mipi-mode = "MIPI_DBI_MODE_SPI_4WIRE";
+			reg = <0>;
+			width = <160>;
+			height = <80>;
+			inversion-on;
+			x-offset = <1>;
+			y-offset = <26>;
+			madctl = <0xa8>;
+			colmod = <0x05>;
+			invctr = <7>;
+			vmctr1 = <0x0e>;
+			pwctr1 = [a2 02 84];
+			pwctr2 = [c1];
+			pwctr3 = [0a 00];
+			pwctr4 = [8a 2a];
+			pwctr5 = [8a ee];
+			frmctr1 = [01 26 2e];
+			frmctr2 = [01 26 2e];
+			frmctr3 = [01 26 2e 01 26 2e];
+			gamctrp1 = [0f 1a 0f 18 2f 28 20 22 1f 1b 23 37 00 07 02 10];
+			gamctrn1 = [0f 1b 0f 17 33 2c 29 2e 30 2e 30 3b 00 07 03 10];
+			caset = [00 01 00 a0];
+			raset = [00 1a 00 69];
+		};
+	};
+};
+
+&adc0 {
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	channel@0 {
+		reg = <0>;
+		zephyr,gain = "ADC_GAIN_1";
+		zephyr,reference = "ADC_REF_INTERNAL";
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+		zephyr,resolution = <12>;
+	};
+};
+
+/* ADC unit 2 channel 0 maps to GPIO11 on ESP32-S3, which is LoRa MISO here. */
+&adc1 {
+	status = "disabled";
+};
+
+&uart0 {
+	status = "okay";
+	current-speed = <115200>;
+	pinctrl-0 = <&uart0_default>;
+	pinctrl-names = "default";
+};
+
+&uart2 {
+	status = "okay";
+	current-speed = <115200>;
+	pinctrl-0 = <&uart2_default>;
+	pinctrl-names = "default";
+
+	gnss: gnss-nmea-generic {
+		compatible = "gnss-nmea-generic";
+		status = "okay";
+	};
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&cpu0 {
+	clock-frequency = <DT_FREQ_M(160)>;
+};
+
+&cpu1 {
+	clock-frequency = <DT_FREQ_M(160)>;
+};
+
+&i2c0 {
+	status = "okay";
+	clock-frequency = <I2C_BITRATE_FAST>;
+	pinctrl-0 = <&i2c0_default>;
+	pinctrl-names = "default";
+};
+
+&spi2 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+	pinctrl-0 = <&spim2_default>;
+	pinctrl-names = "default";
+	cs-gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
+
+	lora0: lora@0 {
+		compatible = "semtech,sx1262";
+		reg = <0>;
+		reset-gpios = <&gpio0 12 (GPIO_OPEN_DRAIN | GPIO_ACTIVE_LOW)>;
+		busy-gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+		dio1-gpios = <&gpio0 14 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>;
+
+		/* KCT8103L control per MeshCore:
+		 * - PA_CSD/GPIO4: active-HIGH FEM enable
+		 * - PA_CTX/GPIO5: HIGH=TX, LOW=RX/LNA
+		 * - SX1262 DIO2: internal RF switch TX select */
+		antenna-enable-gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
+		tx-enable-gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
+		dio2-tx-enable;
+
+		dio3-tcxo-voltage = <SX126X_DIO3_TCXO_1V8>;
+		tcxo-power-startup-delay-ms = <5>;
+		rx-boosted;
+		spi-max-frequency = <4000000>;
+		status = "okay";
+	};
+};
+
+&spi3 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+	pinctrl-0 = <&spim3_default>;
+	pinctrl-names = "default";
+	cs-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;  /* GPIO38 */
+	use-iomux;
+};
+
+&timer0 { status = "okay"; };
+&timer1 { status = "okay"; };
+&timer2 { status = "okay"; };
+&timer3 { status = "okay"; };
+
+&wdt0 { status = "okay"; };
+&trng0 { status = "okay"; };
+
+&esp32_bt_hci { status = "okay"; };
+&wifi { status = "okay"; };
+&usb_serial { status = "okay"; };
+&st7735r_160x80 { status = "okay"; };

zephcore/boards/esp32/heltec_wireless_tracker_v2/heltec_wireless_tracker_v2_procpu_defconfig

@@ -0,0 +1,13 @@
+# Heltec Wireless Tracker V2 — minimal Zephyr defconfig (procpu)
+CONFIG_CLOCK_CONTROL=y
+CONFIG_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_CONSOLE=y
+CONFIG_GPIO=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+CONFIG_PINCTRL=y
+CONFIG_SPI=y
+CONFIG_I2C=y
+CONFIG_FLASH=y
+CONFIG_FLASH_MAP=y
+CONFIG_NVS=y

zephcore/boards/example_board/README.md

@@ -43,7 +43,8 @@ SWD flash: `west flash` (requires J-Link, pyocd, or nrfjprog connected).
 | Heltec V3            | `west build -b heltec_wifi_lora32_v3/esp32s3/procpu zephcore` | `west flash` |
 | Heltec V4.2 (GC1109 PA)  | `west build -b heltec_wifi_lora32_v4/esp32s3/procpu zephcore`  | `west flash` |
 | Heltec V4.3 (KCT8103L PA) | `west build -b heltec_wifi_lora32_v43/esp32s3/procpu zephcore` | `west flash` |
-| Heltec Wireless Tracker | `west build -b heltec_wireless_tracker/esp32s3/procpu zephcore` | `west flash` |
+| Heltec Wireless Tracker V1.1 | `west build -b heltec_wireless_tracker/esp32s3/procpu zephcore` | `west flash` |
+| Heltec Wireless Tracker V2 | `west build -b heltec_wireless_tracker_v2/esp32s3/procpu zephcore` | `west flash` |
 | LilyGo T-Beam v1.2     | `west build -b ttgo_tbeam/esp32/procpu zephcore`               | `west flash` |
 
 **Heltec V3 console:** ZephCore routes console/shell to `uart0` on V3. Use the UART serial port for boot logs and CLI.
@@ -53,6 +54,11 @@ unclear, check GPIO2's default pull: the V4.2 GC1109 PA has an internal pull-dow
 (GPIO2 reads LOW at boot), while the V4.3 KCT8103L PA has an internal pull-up
 (GPIO2 reads HIGH). Only difference in firmware: TX control pin GPIO46→GPIO5.
 
+**Heltec Wireless Tracker V1.1 vs V2:** use `heltec_wireless_tracker` for the
+upstream Zephyr V1.1 target and `heltec_wireless_tracker_v2` for the ESP32-S3FN8
+V2 board with KCT8103L PA/FEM. The V2 pin map is documented in
+`boards/esp32/heltec_wireless_tracker_v2/README.md`.
+
 **LilyGo T-Beam v1.2:** Classic ESP32 (PICO-D4) board — several caveats apply:
 - Upstream Zephyr DTS models the SX1276 variant; `board.overlay` overrides the radio node to SX1262 on the same SPI3 wiring.
 - PICO-D4 rev 1.0 bootloops when the bootloader tries to enable QIO flash mode. `board.conf` forces DIO (`CONFIG_ESPTOOLPY_FLASHMODE_DIO=y`). Any new classic ESP32 board with PICO-D4 needs this.

zephcore/boards/supported_boards.md

@@ -41,6 +41,7 @@ heltec_wifi_lora32_v3/esp32s3/procpu
 heltec_wifi_lora32_v4/esp32s3/procpu
 heltec_wifi_lora32_v43/esp32s3/procpu
 heltec_wireless_tracker/esp32s3/procpu
+heltec_wireless_tracker_v2/esp32s3/procpu
 ttgo_tbeam/esp32/procpu
 ```
 
@@ -51,6 +52,10 @@ ttgo_tbeam/esp32/procpu
 > **Heltec Wireless Tracker** (`heltec_wireless_tracker/esp32s3/procpu`): V1.1
 > ESP32-S3-FN8 companion with SX1262, ST7735R 160x80 TFT, and UC6580 GPS.
 >
+> **Heltec Wireless Tracker V2** (`heltec_wireless_tracker_v2/esp32s3/procpu`):
+> ESP32-S3FN8 companion with SX1262 + KCT8103L PA/FEM, ST7735R 160x80 TFT,
+> UC6580 GNSS, battery ADC, and USB-C native serial/JTAG.
+>
 > **LilyGo T-Beam** (`ttgo_tbeam/esp32/procpu`): classic ESP32 (PICO-D4) with
 > SX1262, AXP2101 PMU, and GNSS. Use this for the **v1.2 SX1262** variant — the
 > upstream Zephyr DTS models the SX1276 radio, which ZephCore overrides to