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https://github.com/liquidraver/ZephCore.git
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update thinknode + example
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liquidraver
@@ -187,7 +187,8 @@ CONFIG_USBD_LOG_LEVEL_WRN=y
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CONFIG_POWEROFF=y
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# ========== LoRa Power Saving ==========
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# RX duty cycle OFF by default — causes marginal packet loss on repeaters.
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# RX duty cycle OFF by default — LR1110 cannot lock on mid-preamble,
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# causing packet loss with duty-cycled RX. SX1262/LLCC68 handle it fine.
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# Enable per-board via board.conf, or at runtime via CLI "set rxduty on".
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CONFIG_ZEPHCORE_LORA_RX_DUTY_CYCLE=n
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@@ -41,10 +41,11 @@ PATTERN 2: Fully Custom Board (new DTS)
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Use this when your board does NOT exist in Zephyr's tree.
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You need a full board definition: .dts, pinctrl, Kconfig, etc.
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Examples: Ikoka Nano 30dBm (custom nRF52840 design)
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Examples: Ikoka Nano 30dBm, ThinkNode M1 (custom nRF52840 designs)
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Look at an existing custom board as a template:
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zephcore/boards/nrf52840/ikoka_nano_30dbm/
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Look at existing custom boards as templates:
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zephcore/boards/nrf52840/ikoka_nano_30dbm/ — minimal (LoRa only)
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zephcore/boards/nrf52840/thinknode_m1/ — full-featured (EPD, GPS, QSPI, buzzer)
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A full custom board includes:
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board.conf — Kconfig (name, radio, overrides)
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@@ -56,6 +56,15 @@ CONFIG_BT_DIS_MODEL_NUMBER_STR="My Board v1"
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# 2. Set zephyr,display = &your_display; in the "chosen" block
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# 3. That's it — driver, CFB, and UI all auto-enable
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#
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# HEAP WARNING: The CFB framebuffer is allocated via k_malloc at boot.
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# The default heap (2048 in zephcore_common.conf) fits 128x64 OLEDs.
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# Displays larger than 128x64 WILL fail silently (-ENOMEM, blank screen).
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# Override the heap for your display resolution:
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# 200x200 (SSD1681): CONFIG_HEAP_MEM_POOL_SIZE=6144
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# 296x128 (SSD1680): CONFIG_HEAP_MEM_POOL_SIZE=6144
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# On RAM-constrained MCUs (nRF52840), you may also need to shrink the
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# RTT buffer: CONFIG_SEGGER_RTT_BUFFER_SIZE_UP=1024 (saves 3KB).
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#
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# To DISABLE display on a board WITHOUT a screen (enables LED heartbeat):
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# CONFIG_ZEPHCORE_UI_DISPLAY=n
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# The heartbeat LED (led0 alias) only blinks when display is disabled
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@@ -124,7 +133,8 @@ CONFIG_BT_DIS_MODEL_NUMBER_STR="My Board v1"
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# ESP32-C3: 300 (limited DRAM)
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# CONFIG_ZEPHCORE_MAX_CONTACTS=450
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# ========== OPTIONAL: Disable RX Duty Cycle ==========
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# Inherited from platform common config as enabled (power savings).
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# Override here if your board is wall-powered.
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# CONFIG_ZEPHCORE_LORA_RX_DUTY_CYCLE=n
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# ========== OPTIONAL: RX Duty Cycle ==========
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# Disabled by default in zephcore_common.conf because the LR1110 cannot lock
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# on mid-preamble, causing packet loss with duty-cycled RX.
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# SX1262/LLCC68 boards handle duty cycle fine — enable for battery savings:
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# CONFIG_ZEPHCORE_LORA_RX_DUTY_CYCLE=y
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@@ -81,8 +81,9 @@
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* MG24: skip (usart0 already set)
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*/
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/* --- Display (uncomment if board has OLED/LCD) ---
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* zephyr,display = &oled;
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/* --- Display (uncomment if board has OLED/LCD/e-paper) ---
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* zephyr,display = &oled; I2C OLED (SH1106, SSD1306)
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* zephyr,display = &epd; SPI e-paper (SSD1681, etc.)
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*/
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};
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};
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@@ -774,6 +775,50 @@
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* };
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*/
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/* --- E-Paper Display on SPI (any platform with SPI) ---
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*
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* Supported: "solomon,ssd1681" (1.54" 200x200 mono)
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* Remember to set zephyr,display = &epd; in chosen block.
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*
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* IMPORTANT — HEAP: The CFB framebuffer is allocated via k_malloc at boot.
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* The default heap (2048) is sized for 128x64 OLEDs (1024 bytes).
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* Larger displays need more heap in board.conf:
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*
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* Display Resolution Framebuffer Heap needed
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* SSD1306/SH1106 128x64 1024 bytes 2048 (default)
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* SSD1681 200x200 5000 bytes 6144+
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* SSD1680 296x128 4736 bytes 6144+
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*
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* If the heap is too small, cfb_framebuffer_init() silently fails
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* with -ENOMEM and the display stays blank (white for e-paper).
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*
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* The MIPI DBI node wraps SPI with DC and RST GPIOs.
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* The display node is a child of the MIPI DBI node.
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*
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* If your EPD has a separate power/boost-converter enable GPIO,
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* add a regulator-fixed node with regulator-boot-on (see ThinkNode M1).
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*
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* / {
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* mipi_dbi {
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* compatible = "zephyr,mipi-dbi-spi";
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* spi-dev = <&spi3>;
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* dc-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
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* reset-gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
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* #address-cells = <1>;
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* #size-cells = <0>;
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*
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* epd: ssd16xxfb@0 {
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* compatible = "solomon,ssd1681";
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* mipi-max-frequency = <4000000>;
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* reg = <0>;
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* width = <200>;
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* height = <200>;
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* busy-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
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* };
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* };
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* };
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*/
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/* --- I2C Environment Sensors (any platform with I2C) ---
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*
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* Auto-detected at runtime. Just include the common dtsi.
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@@ -4,3 +4,10 @@
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config BOARD_THINKNODE_M1
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select SOC_NRF52840_QIAA
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# Board power enable (P0.12) must be HIGH before QSPI flash can respond.
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# QSPI NOR init priority is 41 — regulator must run first.
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if REGULATOR_FIXED
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config REGULATOR_FIXED_INIT_PRIORITY
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default 30
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endif
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@@ -26,3 +26,12 @@ CONFIG_ZEPHCORE_MAX_CONTACTS=510
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# PWM for buzzer
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CONFIG_PWM=y
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# ========== RAM budget ==========
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# SSD1681 200x200 CFB framebuffer needs 5000 bytes from k_malloc.
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# Default heap (2048) is sized for SSD1306 128x64 (1024 bytes).
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CONFIG_HEAP_MEM_POOL_SIZE=6144
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# Shrink RTT buffer to free RAM (4096 → 1024, saves 3KB).
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# Only used during J-Link debugging, 1KB is Zephyr's default.
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CONFIG_SEGGER_RTT_BUFFER_SIZE_UP=1024
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@@ -172,6 +172,16 @@
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};
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};
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/* Display power enable (P1.11) — drives the EPD's boost converter /
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* frontlight. Without this HIGH, SPI works but the charge pump
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* cannot flip e-ink particles (display appears dead). */
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disp_pwr_enable: disp-pwr-enable {
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compatible = "regulator-fixed";
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regulator-name = "disp-pwr-enable";
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enable-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
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regulator-boot-on;
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};
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/* ---- E-Paper display (MIPI DBI SPI) ----
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* SSD1681 1.54" 200x200 monochrome EPD on SPI3.
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* The MIPI DBI node wraps the SPI bus with DC and RST GPIOs.
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