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Fixed bug for RAMFUNC definition
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@@ -106,7 +106,14 @@ extern bool g_tearoff_enabled;
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//#define RAMFUNC __attribute((long_call, section(".ramfunc")))
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// PM5 is at32f435 of CM4 kernal, not at91sam7s arm7, so PM5 unsupported 'arm' old instruction sets.
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// about diff see: https://community.arm.com/support-forums/f/architectures-and-processors-forum/5814/what-is-difference-between-arm7-and-arm-cortex-m-series
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// if you use '__attribute__((target("arm")))' for CM4 kernal, will error when compile(error: target CPU does not support ARM mode)
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#ifdef PM5
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#define RAMFUNC __attribute((section(".ramfunc"))) __attribute__((noinline))
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#else
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#define RAMFUNC __attribute((long_call, section(".ramfunc"))) __attribute__((target("arm"))) __attribute__((noinline))
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#endif
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#ifndef PM3_ROTR
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# define PM3_ROTR(x,n) (((uintmax_t)(x) >> (n)) | ((uintmax_t)(x) << ((sizeof(x) * 8) - (n))))
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