Antiklesys
4319268e1b
Merge branch 'master' of https://github.com/Antiklesys/proxmark3
2026-04-15 11:19:02 +08:00
Antiklesys
d92c9e06e9
Update cmdhficlass.c
2026-04-15 11:18:47 +08:00
Antiklesys
f1e1e609c6
Changelog update
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Updated changelog
Signed-off-by: Antiklesys <syselkitna@gmail.com >
2026-04-15 03:34:39 +08:00
Antiklesys
cea87a128f
Update cipher_bs_dispatch.c
2026-04-15 01:29:33 +08:00
Antiklesys
42d7edfd0e
Update CHANGELOG.md
2026-04-15 01:15:24 +08:00
Antiklesys
8d6e474a75
hf iclass legbrute speed improvements #1
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Imported updates from legbrute hashcat modules to speed up hf iclass legbrute
1. Bitslicing — biggest win (~32×)
Kernel stores each cipher register (l, r, b, t) as 32 parallel 1-bit lanes in u32s (m64000_a3-pure.cl:147-201, bs_iclass_tick) and computes 32 MACs per tick. The CPU doMAC_brute does 1 at a time. A 64-bit bitslice port would give ~64× per core; AVX2 gets 256×. This is the single largest speedup lever.
2. Early-reject after 8 output ticks
In m64000_sxx (m64000_a3-pure.cl:534-535) the kernel breaks out as soon as the first MAC byte can't match. doMAC_brute always produces the full 32 output bits before memcmp. Comparing byte-by-byte as bits are produced saves ~3× on the output phase since 255/256 keys fail after byte 0.
3. Pre-expanded y_ccnr bit array
Kernel expands the 96 input bits into a flat array once (m64000_a3-pure.cl:239-247) and reuses it for every candidate. suc_bytes in cipher.c:181 re-does b >>= 1 shifts for every key. Pre-expanding lets the inner loop be branch-free and vectorizable.
4. Widen lanes to 256/512 via AVX2/AVX-512. The bitslice code is written against a single uint64_t lane type — swapping for __m256i/__m512i (or an abstracted bs_word_t) gives 4×/8× throughput on hosts that support it, with scalar u64 fallback on ARM/older x86. NEON gives 2× for ARM.
2026-04-15 01:09:19 +08:00
Philippe Teuwen
61a7c55a2c
changelog
2026-04-14 10:22:17 +02:00
Philippe Teuwen
47102b202e
changelog
2026-04-14 10:21:14 +02:00
Philippe Teuwen
961e59b5d1
Revert "Release v4.21611 - BREAKMEIFYOUCAN!"
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This reverts commit aaacc75e9f .
2026-04-14 10:19:30 +02:00
Philippe Teuwen
aaacc75e9f
Release v4.21611 - BREAKMEIFYOUCAN!
v4.21611
2026-04-14 10:19:30 +02:00
Philippe Teuwen
00cb528de7
prepare release
2026-04-14 10:19:11 +02:00
Philippe Teuwen
148871b3b5
few docker tests adjustments
2026-04-14 10:15:46 +02:00
Philippe Teuwen
c0ecb1c626
fpga_compress: fix heap corruption
2026-04-14 10:14:38 +02:00
Philippe Teuwen
d6c823bea3
fix lib cmakelist & fix cmakelist alphabetic order
2026-04-13 21:44:50 +02:00
Philippe Teuwen
07cb7e8a11
remove warning
2026-04-13 15:21:53 +02:00
kormax
f9a5ba0d11
Fix uninit cppcheck warnings in GST module
2026-04-13 14:14:23 +02:00
kormax
ea10002efc
Fix CHANGELOG
2026-04-13 14:14:23 +02:00
Philippe Teuwen
57c75ff678
arraylen
2026-04-13 09:46:50 +02:00
Philippe Teuwen
22dfe15967
update release template
2026-04-13 09:42:59 +02:00
Philippe Teuwen
88d20bd4f2
make style
2026-04-13 09:35:02 +02:00
Philippe Teuwen
06bedd410e
ulaes info: align output
2026-04-13 09:30:40 +02:00
Iceman
fc3dbe56bd
Merge pull request #3208 from R4H33M/iclass-page-support
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Add --page flag to hf iclass dump
2026-04-13 08:18:07 +07:00
Iceman
0adf450bc4
Merge pull request #3232 from Antiklesys/master
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hf secc crypto bug fixes
2026-04-13 08:12:00 +07:00
Iceman
7b23ddba54
Merge pull request #3233 from kormax/felica-trace-improved-annotation
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Annotate more FeliCa commands with 'hf felica list'
2026-04-13 08:11:19 +07:00
Iceman
b77b400ab8
Merge pull request #3231 from kormax/felica-more-system-codes
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Add more systems to 'felica_system_code_list.json'
2026-04-13 07:56:52 +07:00
kormax
b8c2e2531f
Annotate more FeliCa commands with 'hf felica list'
2026-04-12 12:40:20 +03:00
Raheem Idowu
8d5779ac00
only pagesel when necessary
2026-04-11 18:20:08 -04:00
Antiklesys
d331e57c78
hf secc crypto bug fixes
2026-04-12 03:16:41 +08:00
kormax
9fdfebf3e8
Add more systems to 'felica_system_code_list.json'
2026-04-11 20:24:16 +03:00
Iceman
84bc068652
Merge pull request #3229 from team-orangeBlue/mfp_write_checker
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Add ST check to `hf mfp wrbl`, fix ST RO checks for 16-block sectors
2026-04-11 14:24:37 +07:00
Iceman
14824ca680
Merge branch 'master' into mfp_write_checker
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Signed-off-by: Iceman <iceman@iuse.se >
2026-04-11 14:24:26 +07:00
iceman1001
6af1a8e432
updated help text for `lf realy
2026-04-11 09:04:55 +07:00
Iceman
652e6fc136
Merge pull request #3228 from kormax/felica-system-annotation
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Add FeliCa system code annotation
2026-04-11 08:09:52 +07:00
Iceman
344b3f6fa7
Merge pull request #3227 from kormax/felica-system-code-list
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Introduce 'felica_system_code_list.json' resource for FeliCa system codes
2026-04-11 08:08:27 +07:00
iceman1001
c502d2d88d
fix cmake
2026-04-11 08:06:48 +07:00
iceman1001
36a5c881d0
proper fix for ip, socket handling for win32 , proxspace env
2026-04-11 08:01:48 +07:00
team-orangeBlue
877e5c6b70
bugfix #2
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oops #2
Signed-off-by: team-orangeBlue <63470411+team-orangeBlue@users.noreply.github.com >
2026-04-11 00:57:28 +03:00
team-orangeBlue
38af2eb1c5
bugfix
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oops
Signed-off-by: team-orangeBlue <63470411+team-orangeBlue@users.noreply.github.com >
2026-04-11 00:56:59 +03:00
team-orangeBlue
8e1f2d7a8f
Update CHANGELOG.md
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Signed-off-by: team-orangeBlue <63470411+team-orangeBlue@users.noreply.github.com >
2026-04-11 00:42:33 +03:00
team-orangeBlue
9e52f0701f
Correct ACL RO check
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See commit 1cb843a22b
Signed-off-by: team-orangeBlue <63470411+team-orangeBlue@users.noreply.github.com >
2026-04-11 00:41:31 +03:00
team-orangeBlue
1cb843a22b
Fix bug in ACL block-RO checker
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The code as-is would bug out like below:
```
(input) --blk 255 -d ...f0f0f0...
[=] Sector trailer (ST) write detected
[!] ⚠️ Strict ReadOnly Access Conditions on block 240 detected
[!] ⚠️ Strict ReadOnly Access Conditions on block 241 detected
[!] ⚠️ Strict ReadOnly Access Conditions on block 242 detected
```
This is incorrect. in 16-block sectors, ACLs cover chunks of 5 blocks at once.
It should (and now does) look like:
```
[=] Sector trailer (ST) write detected
[!] ⚠️ Strict ReadOnly Access Conditions on blocks 240-244 detected
[!] ⚠️ Strict ReadOnly Access Conditions on blocks 245-249 detected
[!] ⚠️ Strict ReadOnly Access Conditions on blocks 250-254 detected
```
Signed-off-by: team-orangeBlue <63470411+team-orangeBlue@users.noreply.github.com >
2026-04-11 00:38:14 +03:00
team-orangeBlue
2b5ac4ca44
Update CHANGELOG.md
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Signed-off-by: team-orangeBlue <63470411+team-orangeBlue@users.noreply.github.com >
2026-04-11 00:16:56 +03:00
team-orangeBlue
394aec40e2
Add ST+ACL check to hf mfp wrbl
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Sector trailers are now checked for errors.
Writes should not go through if for whatever reason ACLs provided to write are invalid.
Reminder that ACLs are checked on the 4-byte method of MFP with the encrypted-only exchange byte.
Signed-off-by: team-orangeBlue <63470411+team-orangeBlue@users.noreply.github.com >
2026-04-11 00:14:36 +03:00
team-orangeBlue
f8f6216958
Correct a typo in helptext
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Mifare Plus ACLs are 4 bytes, not 3... oops
Fixed typo in `hf mfp acl`
Signed-off-by: team-orangeBlue <63470411+team-orangeBlue@users.noreply.github.com >
2026-04-11 00:11:41 +03:00
kormax
3eecb97a88
Add system code annotation for 'hf felica info' and 'hf felica rqsyscode'
2026-04-10 20:36:50 +03:00
kormax
6b315af2bb
Introduce 'felica_system_code_list.json' resource for FeliCa system codes
2026-04-10 20:18:24 +03:00
iceman1001
a5140dd666
add win32 headers, will need to refactor the lf relay using win32 aswell
2026-04-10 17:05:12 +07:00
iceman1001
f070d8a06e
lf relay - relays between two pm3 devices over internet. Defaults to port 8000, Thanks to Moreno for original source
2026-04-10 14:03:50 +07:00
iceman1001
1b80129132
text
2026-04-10 13:50:41 +07:00
Iceman
89bcec22b2
Merge pull request #3225 from team-orangeBlue/mf_acl_polish
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Polish the `hf mf acl` command
2026-04-10 13:06:23 +07:00