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proxmark3/fpga
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dxl 6bc400db5e Fixed: FPGA PWM clock timing failed to meet the 400 MHz requirement. 
Following discussions and debugging with the hardware engineer, the PWM clock frequency was reduced from 400 MHz to 200 MHz. Subsequent testing confirmed that voltage regulation remained largely unaffected.
2026-10-19 23:09:40 +08:00
..
common
FPGA: Added a workaround for the GW1N-4D IDCODE(Flaws of Apicula).
2026-10-12 19:32:41 +08:00
icopyx
FPGA: Optimization of File Directory Structure
2026-10-12 14:08:22 +08:00
pm3
FPGA: Optimization of File Directory Structure
2026-10-12 14:08:22 +08:00
pm5
Fixed: FPGA PWM clock timing failed to meet the 400 MHz requirement.
2026-10-19 23:09:40 +08:00
tests
FPGA: Optimization of File Directory Structure
2026-10-12 14:08:22 +08:00
common_src.mk
FPGA: PM5 FPGA build implemented.
2026-10-12 14:09:22 +08:00
fpga_icopyx_felica.bit
Unified fpga folders
2023-05-30 19:47:27 +02:00
fpga_icopyx_hf_15.bit
Unified fpga folders
2023-05-30 19:47:27 +02:00
fpga_icopyx_hf.bit
add bitfiles for prox ultimate build
2025-06-08 06:26:33 +01:00
fpga_icopyx_lf.bit
Unified fpga folders
2023-05-30 19:47:27 +02:00
fpga_pm3_felica.bit
hf felica: make reading actually work
2026-08-28 22:35:08 +02:00
fpga_pm3_hf_15.bit
change seed, making new iclass builds work again
2025-06-04 22:03:56 +01:00
fpga_pm3_hf.bit
change seed, making new iclass builds work again
2025-06-04 22:03:56 +01:00
fpga_pm3_lf.bit
hitag2: fix simulation against genuine readers, add restore, fix info
2026-09-04 13:20:29 +02:00
fpga_pm3_ult_felica.bit
add bitfiles for prox ultimate build
2025-06-08 06:26:33 +01:00
fpga_pm3_ult_hf_15.bit
add bitfiles for prox ultimate build
2025-06-08 06:26:33 +01:00
fpga_pm3_ult_hf.bit
add bitfiles for prox ultimate build
2025-06-08 06:26:33 +01:00
fpga_pm3_ult_lf.bit
add bitfiles for prox ultimate build
2025-06-08 06:26:33 +01:00
Makefile
FPGA: Optimization of File Directory Structure
2026-10-12 14:08:22 +08:00
proxmark3_fpga.mk
FPGA: PM5 FPGA build implemented.
2026-10-12 14:09:22 +08:00
proxmark5_fpga.mk
FPGA: Added a workaround for the GW1N-4D IDCODE(Flaws of Apicula).
2026-10-12 19:32:41 +08:00
requirements.txt
FPGA: requirements.txt & run.ys translate & license headers
2026-10-18 11:43:56 +08:00