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PM debug v2

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liquidraver
2026-07-31 17:19:55 +02:00
parent 5f35d8e013
commit 788e4dd48b
3 changed files with 46 additions and 5 deletions
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zephcore/boards/esp32/heltec_wifi_lora32_v4/heltec_wifi_lora32_v4_procpu.dts
+14 -1
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@@ -37,6 +37,7 @@
#include <zephyr/dt-bindings/input/input-event-codes.h>
#include <zephyr/dt-bindings/lora/sx126x.h>
#include <zephyr/dt-bindings/adc/adc.h>
#include <zephyr/dt-bindings/gpio/espressif-esp32-gpio.h>
#include <espressif/partitions_0x0_amp_16M.dtsi>
/ {
@@ -221,7 +222,19 @@
* GPIO2 = CSD (chip select/enable): driven HIGH during radio, LOW in sleep
* GPIO46 = CPS (TX select): HIGH during TX, LOW during RX
* V4.3 (KCT8103L) uses GPIO5 instead of GPIO46 — see heltec_wifi_lora32_v43. */
antenna-enable-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>; /* GC1109 CSD = GPIO2 */
/*
* ESP32_GPIO_SLEEP_HOLD_EN on CSD only. Light sleep powers down
* RTC_PERIPH (chain documented in boards/common/pm_esp32.overlay)
* and GPIO2 is an RTC-capable pad (0-21), so it needs the hold or
* the FEM comes out of a sleep disabled — no PA on transmit, no
* LNA on receive. CPS on GPIO46 is above the RTC range and sits
* in VDD3P3_CPU, which stays powered through light sleep, so it
* is deliberately left alone rather than given a flag the pad may
* not support. (V4.3 moved this line to GPIO5, which IS in range
* and does get the flag — see heltec_wifi_lora32_v43.)
*/
antenna-enable-gpios = <&gpio0 2 (GPIO_ACTIVE_HIGH |
ESP32_GPIO_SLEEP_HOLD_EN)>; /* GC1109 CSD = GPIO2 */
tx-enable-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; /* GC1109 CPS = GPIO46 = gpio1 pin 14 */
/* DIO2 drives the SX1262 internal RF switch (TX path select).
zephcore/boards/esp32/heltec_wifi_lora32_v43/heltec_wifi_lora32_v43_procpu.dts
+18 -2
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@@ -36,6 +36,7 @@
#include <zephyr/dt-bindings/input/input-event-codes.h>
#include <zephyr/dt-bindings/lora/sx126x.h>
#include <zephyr/dt-bindings/adc/adc.h>
#include <zephyr/dt-bindings/gpio/espressif-esp32-gpio.h>
#include <espressif/partitions_0x0_amp_16M.dtsi>
/ {
@@ -224,8 +225,23 @@
* GPIO2 = CSD (chip enable): driven HIGH during radio, LOW in sleep
* GPIO5 = CTX (TX/RX select): HIGH during TX, LOW during RX/LNA
* V4.3 CHANGE: CTX moved from GPIO46 (GC1109 CPS) to GPIO5 (KCT8103L CTX). */
antenna-enable-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>; /* KCT8103L CSD = GPIO2 */
tx-enable-gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>; /* KCT8103L CTX = GPIO5 */
/*
* ESP32_GPIO_SLEEP_HOLD_EN on both: light sleep powers down
* RTC_PERIPH (see boards/common/pm_esp32.overlay for the full
* chain), and GPIO2/GPIO5 are RTC-capable pads (0-21), so their
* state is not retained across a sleep unless explicitly held.
* These two lines are the FEM's entire control surface — CSD low
* disables the PA and the LNA with it, CTX low parks the part in
* its receive path — so losing them means transmitting through a
* bypassed PA, tens of dB down, with RX sensitivity gone too,
* while the node otherwise looks healthy and keeps relaying.
* The flag is ignored when CONFIG_PM=n, so this is inert on
* builds that never light-sleep.
*/
antenna-enable-gpios = <&gpio0 2 (GPIO_ACTIVE_HIGH |
ESP32_GPIO_SLEEP_HOLD_EN)>; /* KCT8103L CSD = GPIO2 */
tx-enable-gpios = <&gpio0 5 (GPIO_ACTIVE_HIGH |
ESP32_GPIO_SLEEP_HOLD_EN)>; /* KCT8103L CTX = GPIO5 */
/* DIO2 drives the SX1262 internal RF switch (TX path select).
* Combined with tx-enable-gpios, this keeps both the internal and
zephcore/boards/esp32/heltec_wireless_tracker_v2/heltec_wireless_tracker_v2_procpu.dts
+14 -2
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@@ -26,6 +26,7 @@
#include <zephyr/dt-bindings/adc/adc.h>
#include <zephyr/dt-bindings/input/input-event-codes.h>
#include <zephyr/dt-bindings/lora/sx126x.h>
#include <zephyr/dt-bindings/gpio/espressif-esp32-gpio.h>
#include "heltec_wireless_tracker_v2-pinctrl.dtsi"
/ {
@@ -240,8 +241,19 @@
* - PA_CSD/GPIO4: active-HIGH FEM enable
* - PA_CTX/GPIO5: HIGH=TX, LOW=RX/LNA
* - SX1262 DIO2: internal RF switch TX select */
antenna-enable-gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
tx-enable-gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
/*
* ESP32_GPIO_SLEEP_HOLD_EN on both: light sleep powers down
* RTC_PERIPH (chain documented in boards/common/pm_esp32.overlay)
* and GPIO4/GPIO5 are RTC-capable pads (0-21), so without the
* hold the FEM comes out of a sleep disabled and parked in its
* receive path — transmit goes out through a bypassed PA, tens of
* dB down, and RX loses the LNA, while the node keeps relaying
* and looks healthy. Inert when CONFIG_PM=n.
*/
antenna-enable-gpios = <&gpio0 4 (GPIO_ACTIVE_HIGH |
ESP32_GPIO_SLEEP_HOLD_EN)>;
tx-enable-gpios = <&gpio0 5 (GPIO_ACTIVE_HIGH |
ESP32_GPIO_SLEEP_HOLD_EN)>;
dio2-tx-enable;
dio3-tcxo-voltage = <SX126X_DIO3_TCXO_1V8>;